Adam H Johnson

Address:

9879 N 5800 W, Highland, UT 84003

VIN:

2BPSCR7AX7V000582

Make:

Jeep

Model:

Wrangler 2dr Base Model

Year:

2007

US Patent:

7554858, Jun 30, 2009

Filed:

Aug 10, 2007

Appl. No.:

11/891506

Inventors:

Scott Gatzemeier - Alpine UT, US
Wallace Fister - Meridian ID, US
Adam Johnson - Boise ID, US
Ben Louie - Fremont CA, US

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G11C 7/10

US Classification:

36518902, 36518903, 36518916, 365191

Abstract:

Methods, memory devices and systems are disclosed. In one embodiment, a non-volatile memory device receives command signals through the same input/output terminals that receive address signals and write data signals and transmit read data signals. The input/output terminals are connected to a multiplexer, which is responsive to a received mode control signal to couple the input/output terminals to either a command bus or an input/output bus. A latch in the memory device latches the command signals when the mode control signal causes the input/output terminals to be coupled to the input/output bus. As a result, the command signals continue to be applied to the command bus. When the mode control signal causes the input/output terminals to be coupled to the input/output bus, write data signals are clocked into the memory device and read data signals are clocked out of the memory device responsive to a received clock signal.

US Patent:

8072820, Dec 6, 2011

Filed:

Jun 8, 2009

Appl. No.:

12/480419

Inventors:

Scott Gatzemeier - Alpine UT, US
Wallace Fister - Meridian ID, US
Adam Johnson - Boise ID, US
Ben Louie - Fremont CA, US

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G11C 7/00

US Classification:

36518902, 36518903, 36518908, 36518917, 365191

Abstract:

Methods, memory devices and systems are disclosed. In one embodiment, a non-volatile memory device receives command signals through the same input/output terminals that receive address signals and write data signals and transmit read data signals. The input/output terminals are connected to a multiplexer, which is responsive to a received mode control signal to couple the input/output terminals to either a command bus or an input/output bus. A latch in the memory device latches the command signals when the mode control signal causes the input/output terminals to be coupled to the input/output bus. As a result, the command signals continue to be applied to the command bus. When the mode control signal causes the input/output terminals to be coupled to the input/output bus, write data signals are clocked into the memory device and read data signals are clocked out of the memory device responsive to a received clock signal.

US Patent:

8400844, Mar 19, 2013

Filed:

Sep 21, 2011

Appl. No.:

13/239058

Inventors:

Scott Gatzemeier - Alpine UT, US
Wallace Fister - Meridian ID, US
Adam Johnson - Boise ID, US
Ben Louie - Fremont CA, US

Assignee:

Micron Technology, Inc. - Boise ID

International Classification:

G11C 7/10

US Classification:

36518902, 36518903, 36518917, 36518918, 36518905

Abstract:

Methods, memory devices and systems are disclosed. In one embodiment, a non-volatile memory device receives command signals through the same input/output terminals that receive address signals and write data signals and transmit read data signals. The input/output terminals are connected to a multiplexer, which is responsive to a received mode control signal to couple the input/output terminals to either a command bus or an input/output bus. A latch in the memory device latches the command signals when the mode control signal causes the input/output terminals to be coupled to the input/output bus. As a result, the command signals continue to be applied to the command bus. When the mode control signal causes the input/output terminals to be coupled to the input/output bus, write data signals are clocked into the memory device and read data signals are clocked out of the memory device responsive to a received clock signal.