Ahmad Te Ghaemmaghami

US Patent:

6387206, May 14, 2002

Filed:

Aug 17, 1999

Appl. No.:

09/375456

Inventors:

Ahmad Ghaemmaghami - Gilroy CA
Mehrdad Mahanpour - Union City CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

B44C 122

US Classification:

156345, 216 93

Abstract:

Aspects for a decapsulation system and technique are described. In a method aspect, a portable decapsulation system is provided beneath at least one integrated circuit device on a printed circuit board. Package decapsulation of the least one integrated circuit device occurs through acid blasting by the portable decapsulation system. The portable decapsulation system includes a beaker, fuming acid within the beaker, and a sealed fitting for the beaker and holding an electronic device being decapsulated. Capillaries within the sealed fitting through which the fuming acid is released acid blast the electronic device, and a waste tube coupled to the sealed fitting for removal of solid waste during the acid blast.

US Patent:

7192836, Mar 20, 2007

Filed:

Feb 3, 2000

Appl. No.:

09/497320

Inventors:

Ahmad Ghaemmaghami - Gilroy CA, US
Zoran Krivokapic - Santa Clara CA, US
Brian Swanson - San Jose CA, US

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H01L 21/336

US Classification:

438291, 438302, 438305, 438306

Abstract:

A method and system for providing a halo implant to a semiconductor device is disclosed. The method and system includes providing a thin photoresist layer that covers a substantial amount of an active area including a source region and a drain region of the semiconductor device. The method and system further includes providing the halo implant to the semiconductor device, using the thin photoresist layer as a mask. Utilizing this thin photoresist layer, taking into account other height variables, the source and drain regions can be opened only as needed. At a 45 angle, the implant can be delivered to all transistors in the circuit in the targeted area as well as getting only a large amount of the dose (up to of the dose) to the transistor edge which sits on the trench edge.

US Patent:

61597554, Dec 12, 2000

Filed:

Jul 8, 1998

Appl. No.:

9/111557

Inventors:

Fred Khosropour - San Jose CA
Mehdad Mahanpour - Union City CA
Ahmad Ghaemmaghami - Morgan Hill CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H01L 2166

US Classification:

438 14

Abstract:

A system and method for detecting at least one fault in at least one circuit of a flip-chip package is disclosed. The circuit located on a first portion of a semiconductor die. The method and system include the steps of thinning the semiconductor die without destroying the at least one circuit. The method and system further include applying a liquid having a high evaporation rate in a layer on at least a portion of an exposed surface of the semiconductor die after thinning and applying power to the at least one circuit. The method and system also include determining where at least one portion of the liquid has evaporated from the exposed surface of the semiconductor die to detect the at least one fault.

US Patent:

59044896, May 18, 1999

Filed:

Jul 27, 1998

Appl. No.:

9/122835

Inventors:

Fred Khosropour - San Jose CA
Ahmad Ghaemmaghami - Morgan Hill CA

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA

International Classification:

H01J37/30

US Classification:

438 15

Abstract:

Aspects for topside analysis of an integrated circuit die mounted in a flip-chip orientation are described. In an exemplary method aspect, the method includes isolating the multi-layer integrated circuit die from the flip-chip package, and exposing the multilayer integrated circuit die. The method further includes testing selected areas of the multi-layer integrated circuit die from a topside utilizing critical paths placed in a predetermined arrangement around edges of the multi-layer integrated circuit die.