Alan Curtis Morton

US Patent:

20220329212, Oct 13, 2022

Filed:

Jun 16, 2021

Appl. No.:

17/348982

Inventors:

- Edinburgh, GB
Xin Zhao - Austin TX, US
Jing Bai - Austin TX, US
John L. Melanson - Austin TX, US
Ku He - Austin TX, US
Wai-Shun Shum - Austin TX, US
Xiaofan Fei - Austin TX, US
Alan M. Morton - Austin TX, US

International Classification:

H03F 1/32
H04R 3/02
H04R 29/00
H03F 3/183

Abstract:

An amplification system with an output driver stage for providing an output signal to acoustic output transducers such as speakers or haptic output devices removes signal distortion caused by output stage non-linearities by pre-distorting an input signal. The system includes the output driver stage, an input stage for receiving the input signal, and a processing block that receives the input signal and provides an output signal to the output driver stage. The processing block includes a pre-distortion circuit that applies a pre-distortion function to the input signal to generate the output signal if a signal level of the input signal is greater than a threshold amplitude, and if the signal level is less than or equal to the threshold amplitude, generates the output signal from the input signal by bypassing the pre-distortion circuit.

US Patent:

20190115886, Apr 18, 2019

Filed:

Sep 17, 2018

Appl. No.:

16/133045

Inventors:

- Edinburgh, GB
Alan Mark MORTON - Austin TX, US
Xin ZHAO - Austin TX, US
Lei ZHU - Austin TX, US
Xiaofan FEI - Austin TX, US
Johann G. GABORIAU - Austin TX, US
John L. MELANSON - Austin TX, US
Amar VELLANKI - Cedar Park TX, US

Assignee:

Cirrus Logic International Semiconductor Ltd. - Edinburgh

International Classification:

H03G 3/30
H03F 3/187
H04R 3/00

Abstract:

A system may include a digital pulse width modulator subsystem, a first path coupled to an output of the digital pulse width modulator subsystem, a second path coupled to the output of the digital pulse width modulator subsystem and configured to drive a closed-loop analog pulse width modulator, a controller to select between the first path and the second path for processing a signal based on one or more characteristics of the signal, wherein a first gain of the first path and a second gain of the second path are approximately equal at the time of switching selection between the first path and the second path or vice versa, in order to minimize artifacts due to the switching.

US Patent:

20190115909, Apr 18, 2019

Filed:

Dec 13, 2018

Appl. No.:

16/219187

Inventors:

- Edinburgh, GB
Alan Mark MORTON - Austin TX, US
Xin ZHAO - Austin TX, US
Lei ZHU - Austin TX, US
Xiaofan FEI - Austin TX, US
Johann G. GABORIAU - Austin TX, US
John L. MELANSON - Austin TX, US
Amar VELLANKI - Cedar Park TX, US

Assignee:

Cirrus Logic International Semiconductor Ltd. - Edinburgh

International Classification:

H03K 7/08
H02M 3/157
G06F 1/025

Abstract:

A system may include a digital pulse width modulator subsystem, a first path coupled to an output of the digital pulse width modulator subsystem and configured to drive an open-loop driver stage, a second path coupled to the output of the digital pulse width modulator subsystem and configured to drive a closed-loop analog pulse width modulator, a controller to select between the first path and the second path for processing a signal based on one or more characteristics of the signal, and a calibration subsystem configured to calibrate at least one of a first gain of the first path and a second gain of the second path in order that the first gain and the second gain are at least approximately equal at the time of switching selection between the first path and the second path or vice versa, in order to minimize artifacts due to the switching.

US Patent:

20180159488, Jun 7, 2018

Filed:

Jan 31, 2018

Appl. No.:

15/884912

Inventors:

- Edinburgh, GB
Tejasvi DAS - Austin TX, US
Xiaofan FEI - Austin TX, US
Alan Mark MORTON - Austin TX, US

Assignee:

Cirrus Logic International Semiconductor Ltd. - Edinburgh

International Classification:

H03F 3/217
H03F 3/187
H03F 1/34
H03F 3/38

Abstract:

An amplifier may include a first stage configured to receive an input signal at an amplifier input and generate an intermediate signal which is a function of the input signal, and a final output stage configured to generate an output signal which is a function of the intermediate signal at an amplifier output, and a signal feedback network coupled between the amplifier output and input. The final output stage may be switchable among a plurality of modes including at least a first mode in which the final output stage generates the output signal as a modulated output signal which is a function of the intermediate signal, and a second mode in which the final output stage generates the output signal as an unmodulated output signal which is a function of the intermediate signal. Structure of the feedback network and the first stage may remain static when switching between modes.

US Patent:

20180091102, Mar 29, 2018

Filed:

Sep 27, 2016

Appl. No.:

15/277465

Inventors:

- Edinburgh, GB
Tejasvi DAS - Austin TX, US
Xiaofan FEI - Austin TX, US
Alan Mark MORTON - Austin TX, US

Assignee:

Cirrus Logic International Semiconductor Ltd. - Edinburgh

International Classification:

H03F 3/217
H03F 3/187
H03F 1/34

Abstract:

An amplifier may include a first stage configured to receive an input signal at an amplifier input and generate an intermediate signal which is a function of the input signal, and a final output stage configured to generate an output signal which is a function of the intermediate signal at an amplifier output, and a signal feedback network coupled between the amplifier output and input. The final output stage may be switchable among a plurality of modes including at least a first mode in which the final output stage generates the output signal as a modulated output signal which is a function of the intermediate signal, and a second mode in which the final output stage generates the output signal as an unmodulated output signal which is a function of the intermediate signal. Structure of the feedback network and the first stage may remain static when switching between modes.