Albert Jing Wang

US Patent:

6409932, Jun 25, 2002

Filed:

Dec 27, 2000

Appl. No.:

09/749648

Inventors:

Albert Wang - Moraga CA
Scott Baron - Menlo Park CA
Prasad Padmanabhan - San Francisco CA
Gerald M. Cox - Lafayette CA

Assignee:

Matrix Integrated Systems, Inc. - Richmond CA

International Classification:

B01J 1500

US Classification:

216 55, 34404, 34406, 205209, 432 24, 432121

Abstract:

A method is disclosed for speeding workpiece thoughput in low pressure, high temperature semiconductor processing reactor. The method includes loading a workpiece into a chamber at atmospheric pressure, bringing the chamber down to an intermediate pressure, and heating the wafer while under the intermediate pressure. The chamber is then pumped down to the operating pressure. The preferred embodiments involve single wafer plasma ashers, where a wafer is loaded onto lift pins at a position above a wafer chuck, the pressure is rapidly pumped down to about 40 Torr by rapidly opening and closing an isolation valve, and the wafer is simultaneously lowered to the heated chuck. Alternatively, the wafer can be pre-processed to remove an implanted photoresist crust at a first temperature and the chamber then backfilled to about 40 Torr for further heating to close to the chuck temperature. At 40 Torr, the heat transfer from the chuck to the wafer is relatively fast, but still slow enough to avoid thermal shock. In the interim, the pump line is further pumped down to operating pressure (about 1 Torr) behind the isolation valve.

US Patent:

6461801, Oct 8, 2002

Filed:

May 26, 2000

Appl. No.:

09/579943

Inventors:

Albert Wang - Moraga CA

Assignee:

Matrix Integrated Systems, Inc. - Richmond CA

International Classification:

G03F 742

US Classification:

430329, 430330, 165 61

Abstract:

A workpiece support or chuck that rapidly heats and cools a semiconductor workpiece is disclosed. A heat source and a cooling source, maintained at different temperatures, alternately communicate with the chuck. In one embodiment, the heat source and cooling source alternately provide relatively âhotâ and âcoldâ heat transfer fluids to fluid channels within the workpiece chuck. Accordingly, a semiconductor workpiece in contact with the chuck rapidly heats to the temperature of the hot fluid, or rapidly cools to the temperature of the cold fluid, depending upon which fluid flowing through the chuck. In another embodiment, the heat source comprises a movable resistive heating block at a first temperature that is placed in contact with the chuck during heating, and is removed from the chuck while colder heat transfer fluid circulates within the chuck. Optionally, inert fluid can be provided to purge heat transfer fluid from the chuck channels between heating and cooling steps.

US Patent:

6473461, Oct 29, 2002

Filed:

Apr 4, 2000

Appl. No.:

09/542709

Inventors:

Albert S. Wang - Palo Alto CA

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

H04B 166

US Classification:

37524016

Abstract:

A motion estimator/compensator determines whether to use half-pixel motion vector encoding by comparing the relative benefit of using half-pixel encoding, represented in terms of distortion between the macroblock as encoded and prior to encoding, to the processing burden imposed upon the client computer system in decoding the half-pixel encoded macroblock. Specifically, the motion estimator/compensator quantifies distortions in encoding a subject macroblock as a motion vector to (i) a whole pixel pseudo-macroblock, (ii) a half-column pixel pseudo-macroblock, (iii) a half-row pixel pseudo-macroblock, or (iv) a half-column/half-row pixel pseudo-macroblock. The type of motion vector encoding having the smallest combination of distortion and decoder processing burden is selected and used to encode the subject macroblock. Thus, each type of half-pixel motion estimation is evaluated individually and used for encoding the subject macroblock only if the benefit of the type of half-pixel motion estimation justifies the corresponding additional processing burden imposed upon a client computer system.

US Patent:

6477683, Nov 5, 2002

Filed:

Feb 5, 1999

Appl. No.:

09/246047

Inventors:

Earl A. Killian - Los Altos Hills CA
Ricardo E. Gonzalez - Menlo Park CA
Ashish B. Dixit - Mountain View CA
Monica Lam - Menlo Park CA
Walter D. Lichtenstein - Belmont MA
Christopher Rowen - Santa Cruz CA
John C. Ruttenberg - Newton MA
Robert P. Wilson - Palo Alto CA
Albert Ren-Rui Wang - Fremont CA
Dror Eliezer Maydan - Palo Alto CA

Assignee:

Tensilica, Inc. - Santa Clara CA

International Classification:

G06F 1750

US Classification:

716 1, 716 18

Abstract:

An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

US Patent:

6477697, Nov 5, 2002

Filed:

May 28, 1999

Appl. No.:

09/322735

Inventors:

Earl A. Killian - Los Altos Hills CA
Richard Ruddell - Los Gatos CA
Albert Ren-Rui Wang - Fremont CA

Assignee:

Tensilica, Inc. - Santa Clara CA

International Classification:

G06F 1750

US Classification:

716 18, 716 1, 716 3, 712 15, 712 17, 712200

Abstract:

An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. The standardized language is capable of handling instruction set extensions which modify processor state or use configurable processors. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

US Patent:

6499777, Dec 31, 2002

Filed:

May 5, 2000

Appl. No.:

09/565833

Inventors:

Albert Wang - Moraga CA

Assignee:

Matrix Integrated Systems, Inc. - Richmond CA

International Classification:

B65G 4907

US Classification:

294 11, 41422501, 414935, 414936, 414937, 414940, 414941, 118728, 165 802, 901 31

Abstract:

An end-effector with integrated cooling features comprises heat transferring mechanisms that transfer heat energy away from the end-effector. The end-effector advantageously minimizes the cooling overhead of a processed substrate as it is transported from a process module to a low-cost storage cassette. The reduced cooling overhead of the processed substrate, as a consequence, improves substrate throughput. In the preferred embodiments, the heat transferring mechanisms include a high surface area heat sink connecting the substrate-supporting paddle with a robot arm. Cooling fins can enhance surface area and thus enhance heat dissipation from the heat sink. Cooling channels can extend through paddle and heat sink, either containing circulating fluid for carrying heat beyond the end-effector or a phase changing material in an enclosed heat pipe.

US Patent:

6532837, Mar 18, 2003

Filed:

Feb 3, 2000

Appl. No.:

09/497829

Inventors:

Phillip Yee - San Francisco CA
Albert Y. Wang - Emeryville CA

Assignee:

Rainin Instrument, LLC - Oakland CA

International Classification:

G01N 114

US Classification:

7386414, 7386401

Abstract:

A pipette for repeatedly aspirating and dispensing a predetermined quantity of liquid. The pipette includes a hollow body having first and second extremities. The second extremity is adapted to removably receive the pipette tip. An ejector is carried by the body and has a first extremity disposed within the first extremity of the housing and a second extremity movable vertically about the second extremity of the housing. The ejector is movable from a first position for permitting the pipette tip to be securely mounted on the second extremity of the housing and a second position for pushing the pipette tip off of the second extremity of the housing. A spring is carried by the housing and is compressed so as to store energy in the spring. A locking mechanism is additionally carried by the housing for retaining the spring in the compressed position. The locking mechanism is releaseable so that the ejector is driven by the spring to the second position to move the pipette tip distally on the second extremity of the housing.

US Patent:

6584226, Jun 24, 2003

Filed:

Mar 14, 1997

Appl. No.:

08/819587

Inventors:

Navin Chaddha - Sunnyvale CA
Albert Wang - Palo Alto CA
Sanjeev Mehrotra - Stanford CA

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G06K 946

US Classification:

382236, 382239, 348398, 348669

Abstract:

Methods and apparatus for processing video data that is divided into frames are presented. In one aspect, this relates to a method for processing video data that is divided into frames. The video data includes a current frame, which has an associated current macroblock, and an adjacent frame, which also has an associated macroblock. The method for processing video data involves obtaining an uncompressed current block that is a part of the current macroblock and an adjacent block that is part of the adjacent macroblock, and calculating a distance between the uncompressed current block and the adjacent block. It is determined whether the distance between the uncompressed current block and the adjacent block is acceptable. If the distance is unacceptable, then the motion between the uncompressed current block and the adjacent block is estimated, and the uncompressed current block is adaptively compressed.