Albert H Wang

US Patent:

6473461, Oct 29, 2002

Filed:

Apr 4, 2000

Appl. No.:

09/542709

Inventors:

Albert S. Wang - Palo Alto CA

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

H04B 166

US Classification:

37524016

Abstract:

A motion estimator/compensator determines whether to use half-pixel motion vector encoding by comparing the relative benefit of using half-pixel encoding, represented in terms of distortion between the macroblock as encoded and prior to encoding, to the processing burden imposed upon the client computer system in decoding the half-pixel encoded macroblock. Specifically, the motion estimator/compensator quantifies distortions in encoding a subject macroblock as a motion vector to (i) a whole pixel pseudo-macroblock, (ii) a half-column pixel pseudo-macroblock, (iii) a half-row pixel pseudo-macroblock, or (iv) a half-column/half-row pixel pseudo-macroblock. The type of motion vector encoding having the smallest combination of distortion and decoder processing burden is selected and used to encode the subject macroblock. Thus, each type of half-pixel motion estimation is evaluated individually and used for encoding the subject macroblock only if the benefit of the type of half-pixel motion estimation justifies the corresponding additional processing burden imposed upon a client computer system.

US Patent:

6477683, Nov 5, 2002

Filed:

Feb 5, 1999

Appl. No.:

09/246047

Inventors:

Earl A. Killian - Los Altos Hills CA
Ricardo E. Gonzalez - Menlo Park CA
Ashish B. Dixit - Mountain View CA
Monica Lam - Menlo Park CA
Walter D. Lichtenstein - Belmont MA
Christopher Rowen - Santa Cruz CA
John C. Ruttenberg - Newton MA
Robert P. Wilson - Palo Alto CA
Albert Ren-Rui Wang - Fremont CA
Dror Eliezer Maydan - Palo Alto CA

Assignee:

Tensilica, Inc. - Santa Clara CA

International Classification:

G06F 1750

US Classification:

716 1, 716 18

Abstract:

An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

US Patent:

6477697, Nov 5, 2002

Filed:

May 28, 1999

Appl. No.:

09/322735

Inventors:

Earl A. Killian - Los Altos Hills CA
Richard Ruddell - Los Gatos CA
Albert Ren-Rui Wang - Fremont CA

Assignee:

Tensilica, Inc. - Santa Clara CA

International Classification:

G06F 1750

US Classification:

716 18, 716 1, 716 3, 712 15, 712 17, 712200

Abstract:

An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. The standardized language is capable of handling instruction set extensions which modify processor state or use configurable processors. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.

US Patent:

6584226, Jun 24, 2003

Filed:

Mar 14, 1997

Appl. No.:

08/819587

Inventors:

Navin Chaddha - Sunnyvale CA
Albert Wang - Palo Alto CA
Sanjeev Mehrotra - Stanford CA

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

G06K 946

US Classification:

382236, 382239, 348398, 348669

Abstract:

Methods and apparatus for processing video data that is divided into frames are presented. In one aspect, this relates to a method for processing video data that is divided into frames. The video data includes a current frame, which has an associated current macroblock, and an adjacent frame, which also has an associated macroblock. The method for processing video data involves obtaining an uncompressed current block that is a part of the current macroblock and an adjacent block that is part of the adjacent macroblock, and calculating a distance between the uncompressed current block and the adjacent block. It is determined whether the distance between the uncompressed current block and the adjacent block is acceptable. If the distance is unacceptable, then the motion between the uncompressed current block and the adjacent block is estimated, and the uncompressed current block is adaptively compressed.

US Patent:

6639945, Oct 28, 2003

Filed:

Jan 12, 2001

Appl. No.:

09/759408

Inventors:

Navin Chaddha - Sunnyvale CA
Anoop Gupta - Menlo Park CA
Albert Wang - Palo Alto CA

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

H04N 712

US Classification:

37524023

Abstract:

The present invention relates, in one aspect, to a method for processing video data that is divided into frames. The video data includes a current frame, which has an associated current macroblock, and an adjacent frame, which also has an associated macroblock. The method for processing video data involves obtaining an uncompressed current block that is a part of the current macroblock and an adjacent block that is part of the adjacent macroblock, and calculating a distance between the uncompressed current block and the adjacent block. It is determined whether the distance between the uncompressed current block and the adjacent block is acceptable. If the distance is unacceptable, then the current block is adoptively compressed.

US Patent:

6701515, Mar 2, 2004

Filed:

May 27, 1999

Appl. No.:

09/323161

Inventors:

Robert P. Wilson - Palo Alto CA
Dror E. Maydan - Palo Alto CA
Albert Ren-Rui Wang - Fremont CA
Walter D. Lichtenstein - Belmont MA
Weng Kiang Tjiang - Palo Alto CA

Assignee:

Tensilica, Inc. - Santa Clara CA

International Classification:

G06F 944

US Classification:

717117, 717135, 717138, 717140, 716 1

Abstract:

In selecting and building a processor configuration, a user creates a new set of user-defined instructions, places them in a file directory, and invokes a tool that processes the user instructions and transforms them into a form usable by the software development tools. The user then invokes the software development tools, telling the tools to dynamically use the instructions created in the new directory. In this way, the user may customize a processor configuration by adding new instructions and within minutes, be able to evaluate that feature. The user is able to keep multiple sets of potential instructions and easily switch between them when evaluating their application.

US Patent:

6707852, Mar 16, 2004

Filed:

Aug 31, 2000

Appl. No.:

09/653124

Inventors:

Albert S. Wang - Palo Alto CA

Assignee:

Microsoft Corporation - Redmond WA

International Classification:

H04N 712

US Classification:

37524012, 348700

Abstract:

A motion video signal encoder maximizes image quality without exceeding transmission bandwidth available to carry the encoded motion video signal by comparing encoded frames of the motion video signal to a desired size of frame. If the size of encoded frames differ from the desired size, encoding is adjusted to produce encoded frames closer in size to the desired size. In addition, a cumulative bandwidth error records an accumulated amount of available bandwidth. The cumulative bandwidth error is adjusted as time elapses to add to the available bandwidth and as each frame is encoded to thereby consume bandwidth. As the cumulative bandwidth error grows in magnitude above or below zero, encoding is adjusted as needed to either improve image quality to more completely consume available bandwidth or to reduce image quality to thereby consume less bandwidth and to thereby cause the cumulative bandwidth error to move toward zero. Rapid changes in the amount of change or motion in the motion video signal are detected by comparing the amount of change between two consecutive frames and filtering the amount of change with previously measured amounts of change. Encoding is pre-compensated according to the filtered measurement of rapid change.

US Patent:

6760888, Jul 6, 2004

Filed:

Nov 1, 2002

Appl. No.:

10/286496

Inventors:

Earl A. Killian - Los Altos Hills CA
Ricardo E. Gonzalez - Menlo Park CA
Ashish B. Dixit - Mountain View CA
Monica Lam - Menlo Park CA
Walter D. Lichtenstein - Belmont MA
Christopher Rowen - Santa Cruz CA
John C. Ruttenberg - Newton MA
Robert P. Wilson - Palo Alto CA
Albert Ren-Rui Wang - Fremont CA

Assignee:

Tensilica, Inc. - Santa Clara CA

International Classification:

G06F 1750

US Classification:

716 1, 716 18, 712 1, 712 32, 712 35, 712 36, 712200

Abstract:

An automated processor design tool uses a description of customized processor instruction set extensions in a standardized language to develop a configurable definition of a target instruction set, a Hardware Description Language description of circuitry necessary to implement the instruction set, and development tools such as a compiler, assembler, debugger and simulator which can be used to develop applications for the processor and to verify it. Implementation of the processor circuitry can be optimized for various criteria such as area, power consumption, speed and the like. Once a processor configuration is developed, it can be tested and inputs to the system modified to iteratively optimize the processor implementation. By providing a constrained domain of extensions and optimizations, the process can be automated to a high degree, thereby facilitating fast and reliable development.