Allan A Mitchell
Deceased
from Knoxville, TN
- Also known as:
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- Allana Mitchell
- Allen M Itchell
Allan Mitchell Phones & Addresses
- Knoxville, TN
- Fort Worth, TX
- Louisville, KY
- Hurst, TX
- Florence, KY
- Lexington, KY
- La Grange, KY
Painters
6042150726
Painters
Resumes
Hvac
view sourceHvac
Drilling Supervisor
view sourceRig Superintendent Offshore
Plaster and Wald Aug 1991 - Sep 1998
Drilling Supervisor
Associates, Business Management, Business, Accounting
Allan Mitchell
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Allan Mitchell
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Allan Mitchell
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Allan Mitchell
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Allan Mitchell
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Assistant Professor At Delta State University
view sourceVehicle Records
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Allan Mitchell
view source -
Address:911 E Washington St APT 6, Louisville, KY 40206
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Phone:5027423971
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VIN:JHMGD37417S002849
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Make:HONDA
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Model:FIT
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Year:2007
Isbn (Books And Publications)
Everyman in Europe: Essays in Social History The Preindustrial Millennia
view sourceAuthor
Allan Mitchell
ISBN #
0132935155
Everyman in Europe: Essays in Social History The Industrial Centuries
view sourceAuthor
Allan Mitchell
ISBN #
0132935236
Everyman in Europe:Essays in Social History: Essays in Social History
view sourceAuthor
Allan Mitchell
ISBN #
0132935635
The Nazi Revolution: Hitler's Dictatorship and the German Nation
view sourceAuthor
Allan Mitchell
ISBN #
0669208809
The Nazi Revolution: Hitler's Dictatorship and the German Nation
view sourceAuthor
Allan Mitchell
ISBN #
0669416940
Us Patents
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Polysilicon Resistor Having Adjustable Temperature Coefficients And The Method Of Making The Same
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US Patent:20020008302, Jan 24, 2002
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Filed:Sep 26, 2001
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Appl. No.:09/964192
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Inventors:Varun Singh - Dallas TX, US
Tanmay Kumar - Denton TX, US
Thomas Harrington - Carrollton TX, US
Roy Hensley - Plano TX, US
Allan Mitchell - Heath TX, US
Jack Qian - Plano TX, US -
Assignee:Dallas Semiconductor Corporation
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International Classification:H01L029/00
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US Classification:257/538000
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Abstract:A polysilicon resistor is formed using a late implant process. Low dopant concentrations on the order of 6×10to 3.75×10have shown good results. with a reduced post anneal temperature. Both the first and second order temperature coefficients (TC1 and TC2) can then be adjusted. Using electrical trimming resistors can be produced with highly linear temperature characteristics. By varying the geometries of the resistors, low trimming threshold current densities and voltages can be used to produce good results.
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Low Leakage Capacitor For Analog Floating-Gate Integrated Circuits
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US Patent:20130130450, May 23, 2013
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Filed:Dec 18, 2012
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Appl. No.:13/718485
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Inventors:TEXAS INSTRUMENTS INCORPORATED - Dallas TX, US
Allan T. Mitchell - Heath TX, US
Kaiping Liu - Plano TX, US -
Assignee:TEXAS INSTRUMENTS INCORPORATED - Dallas TX
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International Classification:H01L 29/94
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US Classification:438239
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Abstract:An analog floating-gate electrode in an integrated circuit, and method of fabricating the same, in which trapped charge can be stored for long durations. The analog floating-gate electrode is formed in a polycrystalline silicon gate level, and includes portions serving as a transistor gate electrode, a plate of a metal-to-poly storage capacitor, and a plate of poly-to-active tunneling capacitors. Silicide-block silicon dioxide blocks the formation of silicide cladding on the electrode, while other polysilicon structures in the integrated circuit are silicide-clad.
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Planar Famos Transistor With Sealed Floating Gate And Dcs+N.sub.2 O Oxide
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US Patent:48335142, May 23, 1989
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Filed:Nov 18, 1987
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Appl. No.:7/121980
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Inventors:Agerico L. Esquivel - Dallas TX
Allan T. Mitchell - Garland TX -
Assignee:Texas Instruments Incorporated - Dallas TX
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International Classification:H01L 2978
H01L 21306
B44C 122 -
US Classification:357 235
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Abstract:The invention provides an EPROM having a high quality dielectric to separate the floating gate from low quality dielectric layers used in the prior art by the method outlined as follows. First, the polycrystalline silicon floating gates are formed and partially patterned on the surface of a substrate. A thin thermally grown oxide layer is then formed over the entire array. The source/drain regions are then implanted through the thin silicon dioxide layer into the substrate. Next a thick silicon dioxide layer is deposited by chemical vapor deposition on the surface of the array. The surface of the array is then coated with photoresist which, because of its nature, provides a planarized surface on the top layer of photoresist. The photoresist and the silicon dioxide layer are then etched using an etching process which provides an etching ratio of 1:1 between photoresist and silicon dioxide. The photoresist is completely etched away thus leaving the planarized silicon dioxide surface.
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Method Of Making An Array Device With Buried Interconnects
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US Patent:50844180, Jan 28, 1992
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Filed:Jan 16, 1990
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Appl. No.:7/465563
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Inventors:Agerico L. Esquivel - Dallas TX
Howard L. Tigelaar - Allen TX
Allan T. Mitchell - Garland TX -
Assignee:Texas Instruments Incorporated - Dallas TX
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International Classification:H01L 2170
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US Classification:437203
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Abstract:Bitlines (34) are formed by creating a diffused region (26) around the sidewalls and bottom of a trench (20). The trench (20) is filled with a conductive region (30), typically a refractory metal, refractory metal silicide.
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Floating Gate Memory Cell And Device
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US Patent:49790048, Dec 18, 1990
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Filed:Jan 23, 1990
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Appl. No.:7/469814
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Inventors:Agerico L. Esquivel - Dallas TX
Allan T. Mitchell - Garland TX
Howard L. Tigelaar - Allen TX -
Assignee:Texas Instruments Incorporated - Dallas TX
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International Classification:H01L 2968
H01L 2906
G11C 1134 -
US Classification:357 235
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Abstract:One embodiment of the invention provides an EPROM and a method of fabricating an EPROM with enhanced capacitive coupling. Trenched memory cells each comprise a pleat-shaped floating gate with the control gate nested in a fold of the floating gate to increase the coupling ratio with the control gate. As a result higher programming speed and improved cell density may be obtained for a given programming voltage. Formation of bit lines along trench walls results in lower bit line resistivity for a given cell density.
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Method Of Making A Pleated Floating Gate Trench Eprom
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US Patent:50454900, Sep 3, 1991
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Filed:Aug 21, 1990
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Appl. No.:7/570655
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Inventors:Agerico L. Esquivel - Dallas TX
Allan T. Mitchell - Garland TX
Howard L. Tigelaar - Allen TX -
Assignee:Texas Instruments Incorporated - Dallas TX
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International Classification:H01L 21265
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US Classification:437 43
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Abstract:One embodiment of the invention provides an EPROM and a method of fabricating an EPROM with enhanced capacitive coupling. Trenched memory cells each comprise a pleat-shaped floating gate with the control gate nested in a fold of the floating gate to increase the coupling ratio with the control gate. As a result higher programming speed and improved cell density may be obtained for a given programming voltage. Formation of bit lines along trench walls results in lower bit lines resistivity for a given cell density.
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Fast, Trench Isolated, Planar Flash Eeproms With Silicided Bitlines
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US Patent:49511033, Aug 21, 1990
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Filed:Jun 3, 1988
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Appl. No.:7/202766
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Inventors:Agerico L. Esquivel - Dallas TX
Allan T. Mitchell - Garland TX -
Assignee:Texas Instruments, Incorporated - Dallas TX
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International Classification:H01L 2978
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US Classification:357 235
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Abstract:A non-volatie cross-point memory cell array comprises a trench isolated cross-point array of memory cells (10), which are electrically programmable and electrically FLASH eraseable, having diffused regions (28) operable as bitlines, each diffused region (28) traversed by a plurality of control gates (54) operable as wordlines. The diffused regions (28) undergo a silicidation process to decrease their resistivity, and thereby increase the speed of the memory cell array. A tunnel oxide (18) is provided for electrical erasing and programming. Planarized, high quality insulating regions (40, 36), such as dichlorosilane oxide, buttress the floating gate (20) to isolate the bitlines form the wordlines and to improve isolation between the pass gate and the floating gate. A planar structure of the memory cell (10) provides flat topography ideal for three dimensional stacked structures. Trench isolation regions (56) reduce bitline capacitance, thereby increasing programming speed.
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Use Of Sidewall Oxide To Reduce Filaments
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US Patent:48062014, Feb 21, 1989
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Filed:Mar 21, 1988
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Appl. No.:7/170528
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Inventors:Allan T. Mitchell - Dallas TX
Howard L. Tigelaar - Collin TX
Shaym G. Garg - Lubbock TX
Kalipatnam V. Rao - Plano TX -
Assignee:Texas Instruments Incorporated - Dallas TX
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International Classification:H01L 21306
B44C 122
C03C 1500
C03C 2506 -
US Classification:156653
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Abstract:The disclosure relates to a method for reducing filament formation over the BN+ oxide in semiconductor devices wherein a sidewall oxide is formed on the side walls of the first polysilicon layer prior to subsequent formation of the intermediate insulating layer, formation of a second polysilicon layer and subsequent anisotropic etch to provide for removal of all polysilicon over the field oxide.
Amazon
Sherlock Holmes and The Menacing Moors
view sourceA call from an old comrade has Holmes chasing a reported agent of Satan between the towering tors and bottomless bogs of Dartmoor only to find the limits of his own confidence and his Public's esteem. Only Watson stands his friend but even his patience is stretched. Sherlock's retreat to the bees of...
Author
Allan Mitchell
Binding
Paperback
Pages
132
Publisher
MX Publishing
ISBN #
1780927460
EAN Code
9781780927466
ISBN #
8
Unrepentant Patriot: The Life and Work of Carl Zuckmayer
view source"Carl Zuckmayer’s illustrious career as one of Central Europe’s most prolific and popular playwrights during the years of the Weimar Republic after 1918 was cut short by the Nazi seizure of power in Germany in 1933. His plays were banned during the following twelve years, and he was forced to flee i...
Author
Allan Mitchell
Binding
Kindle Edition
Pages
119
Publisher
Trafford Publishing
ISBN #
5
The Great Train Race: Railways and the Franco-German Rivalry, 1815-1914
view source"The breadth of [this] comparative study of French and German railroad development - the largest and most important railway systems on the continent - is a signal achievement... A brief sketch of the book's trajectory does justice neither to the wealth of detail nor to the arresting insights that fu...
Author
Allan Mitchell
Binding
Hardcover
Pages
354
Publisher
Berghahn Books
ISBN #
1571811664
EAN Code
9781571811660
ISBN #
3
Sherlock Holmes and the Menacing Metropolis
view sourceMore Menacing than the Menacing Moors, the Great Metropolis harbours evil and deviltry far more sinister than Dartmoor could offer - it is not for nothing that Watson describes London as the great cesspool draining the Empire of its dregs. Its evil stems from the hearts of the most heartless of men,...
Author
Allan Mitchell
Binding
Paperback
Pages
184
Publisher
MX Publishing
ISBN #
1780928882
EAN Code
9781780928883
ISBN #
2
Professional SQL Server 2005 Integration Services
view sourceThis book will help you get past the initial learning curve quickly so that you can get started using SSIS to transform data, create a workflow, or maintain your SQL Server. Offering you hands-on guidance, you'll learn a new world of integration possibilities and be able to move away from scripting ...
Author
Brian Knight, Allan Mitchell, Darren Green, Douglas Hinson, Kathi Kellenberger, Andy Leonard, Erik Veerman, Jason Gerard, Haidong Ji, Mike Murphy
Binding
Paperback
Pages
720
Publisher
Wrox
ISBN #
0764584359
EAN Code
9780764584350
ISBN #
10
Fleeing Nazi Germany: Five Historians Migrate to America
view sourceThousands of European intellectuals fled from fascism to America in the days leading up to World War II. They had tremendous obstacles, but many of them found success and made meaningful contributions. Historian Allan Mitchell knew five notable scholars of history who escaped, and he recounts in viv...
Author
Allan Mitchell
Binding
Paperback
Pages
124
Publisher
Trafford Publishing
ISBN #
1426955367
EAN Code
9781426955365
ISBN #
9
Revolution in Bavaria, 1918-1919: The Eisner Regime and the Soviet Republic (Princeton Legacy Library)
view sourceThe tangled affairs in Bavaria at the close of World War I constitute a unique and important part of the early Weimar Republic. This study of the 1918 revolution, based on archival sources such as cabinet protocols and bureaucratic records, traces in detail the overthrow of the Wittelsbach dynasty a...
Author
Allan Mitchell
Binding
Paperback
Pages
386
Publisher
Princeton University Press
ISBN #
0691624526
EAN Code
9780691624525
ISBN #
7
Becoming Human: The Matter of the Medieval Child
view sourceBecoming Human argues that human identity was articulated and extended across a wide range of textual, visual, and artifactual assemblages from the twelfth to the fifteenth centuries. J. Allan Mitchell shows how the formation of the child expresses a manifold and mutable style of being. To be human ...
Author
J. Allan Mitchell
Binding
Paperback
Pages
288
Publisher
Univ Of Minnesota Press
ISBN #
0816689970
EAN Code
9780816689972
ISBN #
4
Myspace
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allan mitchell
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Allan Mitchell
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Edmonton Oilers prospect Ostap Safin has outstanding size and skill but is that enough?
view source- move up the pyramid. Allan Mitchell at Lowetide recently took a look at Oilers prospects in this light, and Ive expanded this look to compare how Oilers forward prospects drafted out of the CHL from 2008 to 2018 did both in their draft years and the in the year after there were drafted (Draft +1).
- Date: Aug 13, 2018
- Category: Headlines
- Source: Google
B/R's All-NHL Teams at the 2016 All-Star Break
view source- area of downtown. Many of the names on the following slideshow will be there. Some will not, but they still get the prestige of being named to Bleacher Report All-NHL teams, as conferred by B/R staffers Jonathan Willis, Carol Schram, Allan Mitchell, Luke Richardson, Steve MacFarlane and yours truly.
- Date: Jan 27, 2016
- Category: Sports
- Source: Google
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Allan Mitchell Silga
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Allan W Mitchell
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Mimi Allan Mitchell
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Bruce Allan Mitchell
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