Alok S Doshi

US Patent:

8516322, Aug 20, 2013

Filed:

Sep 28, 2009

Appl. No.:

12/568136

Inventors:

Jayabrata Ghosh Dastidar - Santa Clara CA, US
Alok Shreekant Doshi - Sunnyvale CA, US
Binh Vo - Los Gatos CA, US
Kalyana Ravindra Kantipudi - Sunnyvale CA, US
Sergey Timokhin - Palo Alto CA, US

Assignee:

Altera Corporation - San Jose CA

International Classification:

G01R 31/3183
G01R 31/40

US Classification:

714738, 714725

Abstract:

A programmable integrated circuit may contain multiple logic blocks. Computing equipment may be used to run automated tools that process a design for the programmable integrated circuit to perform corresponding circuit tests. A translation tool may translate a transistor-level description of circuitry on the programmable integrated circuit into a gate-level description. A block-level test configuration data generation tool may generate block-level test configuration data files. The test configuration data files may be used as constraints for an automatic test pattern generation tool that produces block-level test vectors. A full-chip propagation tool may use the block-level test vectors, block-level test configuration data files, and full-chip constraints to produce corresponding full-chip test configuration data and full-chip test vectors for testing the integrated circuit. A translation tool may convert the configuration data and test vectors into a tester file.

US Patent:

20190026497, Jan 24, 2019

Filed:

Sep 24, 2018

Appl. No.:

16/140528

Inventors:

- San Jose CA, US
Ting Lu - Austin TX, US
Brian Wong - Mountain View CA, US
Alok Doshi - Milpitas CA, US
Yun Sum Wong - Sunnyvale CA, US

Assignee:

Altera Corporation - San Jose CA

International Classification:

G06F 21/70
H04L 9/08
G09C 1/00
H04L 9/32
G06F 1/26
G06F 3/06

Abstract:

An integrated circuit includes a control circuit and a one-time programmable circuit. The control circuit determines if the one-time programmable circuit is programmed in response to an attempt to access a mode of the integrated circuit after the integrated circuit powers up. The control circuit generates a signal to indicate to a user of the integrated circuit that the mode of the integrated circuit has been previously accessed if the control circuit determines that the one-time programmable circuit has been programmed to indicate a previous access to the mode of the integrated circuit.

US Patent:

20170257222, Sep 7, 2017

Filed:

Mar 4, 2016

Appl. No.:

15/061622

Inventors:

- San Jose CA, US
Ting Lu - Austin TX, US
Brian Wong - Mountain View CA, US
Alok Doshi - Milpitas CA, US
Yun Sum Wong - Sunnyvale CA, US

Assignee:

Altera Corporation - San Jose CA

International Classification:

H04L 9/32
G06F 1/26

Abstract:

An integrated circuit includes a control circuit, a one-time programmable circuit, and a security feature. The control circuit determines if the one-time programmable circuit is programmed in response to a request by a user of the integrated circuit to access the security feature. The control circuit generates a signal to indicate to the user of the integrated circuit that the security feature has been previously accessed if the control circuit determines that the one-time programmable circuit has been programmed to indicate a previous access to the security feature. The control circuit causes the one-time programmable circuit to be programmed in response to the request if the control circuit determines that the one-time programmable circuit has not been programmed.