Senior process engineer ( wafer Fabrication) at Anadigics
Location:
Greater New York City Area
Industry:
Semiconductors
Work:
Anadigics - United States since Dec 2008
Senior process engineer ( wafer Fabrication)
Motorola Semiconductor - China Jan 2000 - Aug 2003
CVD process engineer
Education:
Penn State University 2003 - 2008
Ph.D, Materials Science
Tianjin University 1997 - 2000
Master, Mechanical Engineering
Tianjin University 1993 - 1997
Bachelor, Mechanical Engineering
Skills:
Semiconductor Fabrication MEMS Lean Manufacturing Six Sigma Wet Chemical Etching Plasma Etch Sputtering R&D experience JMP Design of Experiments SPC Problem Solving
Languages:
English Chinese
Certifications:
Six Sigma Black Belt (American Society for Quality certified), American Society for Quality