Anand Gupta

US Patent:

6374770, Apr 23, 2002

Filed:

Jun 20, 2000

Appl. No.:

09/597856

Inventors:

Peter W. Lee - Fremont CA
Stuardo Robles - Sunnyvale CA
Anand Gupta - San Jose CA
Virendra V. S. Rana - Los Gatos CA
Amrita Verma - Santa Clara CA

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

C23C 1600

US Classification:

118723E, 118697, 118695, 156345, 438513

Abstract:

A chemical vapor deposition system that includes a housing configured to form a processing chamber, a substrate holder configured to hold a substrate within the processing chamber, a gas distribution system configured to introduce gases into the processing chamber, a plasma generation system configured to form a plasma within the processing chamber, a processor operatively coupled to control the gas distribution system and the plasma generation system, and a computer-readable memory coupled to the processor that stores a computer-readable program which directs the operation of the chemical vapor deposition system. In one embodiment the computer-readable program comprises instructions that control the gas distribution system to flow a process gas comprising silicon, oxygen and a halogen family member into the chamber to deposit a halogen-doped silicon oxide film on a substrate positioned on the substrate holder and instructions that control the gas distribution system and plasma generation system to densify the halogen-doped silicon oxide film by bombarding the film with ionic species from a plasma of an argon-containing gas source. In another embodiment, the computer-readable program comprises instructions that control the gas distribution system to flow a process gas comprising silicon, oxygen and a halogen family member into the chamber to deposit a halogen-doped silicon oxide film on said substrate and instructions that control the gas distribution system and plasma generation system to form a plasma from a hydrogen containing source gas to bombard the halogen-doped silicon oxide film with hydrogen ions to remove loosely bound halogen atoms from the film.

US Patent:

6449521, Sep 10, 2002

Filed:

Sep 18, 1998

Appl. No.:

09/156698

Inventors:

Anand Gupta - San Jose CA

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

G06F 1900

US Classification:

700121, 700117, 700119, 700203, 700204, 427569, 427578, 427585, 427535, 438789, 438788, 438792, 438695, 118715, 118725, 118723 R, 29 2501, 29 2502, 29 2503, 134 11, 134 12, 134 13, 156389, 156367

Abstract:

A method and apparatus for reducing fluorine and other sorbable contaminants in plasma reactor used in chemical vapor deposition process such as the deposition of silicon oxide layer by the reaction of TEOS and oxygen. According to the method of the present invention, plasma of an inert gas is maintained in plasma reactor following chamber clean to remove sorbable contaminants such as fluorine. The plasma clean is typically followed by seasoning of the reactor to block or retard remaining contaminants. According to one embodiment of the invention, the combination of chamber clean, plasma clean, and season film is conducted before PECVD oxide layer is deposited on wafer positioned in the plasma reactor.

US Patent:

6465043, Oct 15, 2002

Filed:

Feb 9, 1996

Appl. No.:

08/599230

Inventors:

Anand Gupta - San Jose CA

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

C23C 1600

US Classification:

42725537, 427579, 42725528, 42725529, 4272555, 427569, 438787, 438788, 438789

Abstract:

A method and apparatus for reducing particle contamination in a substrate processing chamber during deposition of a film having at least two layers. The method of the present invention includes the steps of introducing a first process gas into a chamber to deposit a first layer of the film over a wafer at a first selected pressure, introducing a second process gas into the chamber to deposit a second layer of the film over the wafer, and between deposition of said first and second layers, maintaining pressure within the chamber at a pressure that is sufficiently high that particles dislodged by introduction of the second process do not impact the wafer.

US Patent:

6638886, Oct 28, 2003

Filed:

Nov 23, 1998

Appl. No.:

09/200421

Inventors:

Anand Gupta - San Jose CA
Tirunelveli S. Ravi - Santa Clara CA

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

C04B 3510

US Classification:

501127

Abstract:

A plasma fluorine resistant polycrystalline alumina ceramic material is produced by forming a green body including alumina and a binder, and sintering the green body for a time from about 8 to 12 hours. The area % of unsintered particles in the polycrystalline alumina ceramic material does not exceed 0. 1 area %, resulting in reduced emission of particles from the material after exposure to plasma fluorine.

US Patent:

6809809, Oct 26, 2004

Filed:

Mar 4, 2003

Appl. No.:

10/379016

Inventors:

Patrick D. Kinney - Hayward CA
Anand Gupta - Phoenix AZ
Nagaraja P. Rao - San Carlos CA

Assignee:

Real Time Metrology, Inc. - Castro Valley CA

International Classification:

G01N 2100

US Classification:

3562375, 3562371, 3562374

Abstract:

An optical inspection module is provided for detecting defects on a substrate having first and second opposite planar surfaces. The module includes a substrate holding position and first and second measurement instruments. The first instrument includes a first illumination path extending to the substrate holding position and having a grazing angle of incidence with the first surface, which illuminates substantially the entire first surface. A first optical element is oriented to collect non-specularly reflected light scattered by the first surface. A first photodetector has a plurality of pixels positioned within a focal plane of the first lens, which together form a field of view that covers substantially the entire first surface. The second instrument includes a sensor oriented for sensing a physical characteristic of the second surface when the substrate is held in the substrate holding position and the first surface is being illuminated.

US Patent:

8112620, Feb 7, 2012

Filed:

Mar 13, 2009

Appl. No.:

12/403738

Inventors:

Olaf Manczak - Hayward CA, US
Anand S. Gupta - Palo Alto CA, US
Christopher A. Vick - San Jose CA, US

Assignee:

Oracle America, Inc. - Redwood City CA

International Classification:

G06F 9/00
G06F 15/177

US Classification:

713 2

Abstract:

A method for discovery of a root file system that includes obtaining a tag corresponding to a boot image for an operating system, identifying, by a boot loader, a location of the boot image having a predefined value matching the tag, loading a kernel of the operating system retrieved from the boot image, and transferring execution to the kernel, wherein the boot loader provides the tag for the location to the kernel. The method further includes identifying, by the kernel, the location of the root file system based on the tag provided by the boot loader, and executing the operating system on a processor using the root file system identified by the kernel.

US Patent:

62898434, Sep 18, 2001

Filed:

Aug 21, 2000

Appl. No.:

9/643320

Inventors:

Anand Gupta - San Jose CA
Virendra V. S. Rana - Los Gatos CA
Amrita Verma - Pittsburgh PA
Mohan K. Bhan - Sunnyvale CA
Sudhakar Subrahmanyam - Sunnyvale CA

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

C23C 1600
H05H 100
H05H 124

US Classification:

118723E

Abstract:

A method and apparatus for depositing a layer having improved film quality at an interface. The method includes the steps of introducing an inert gas into a processing chamber and forming a plasma from the inert gas by applying RF power to the chamber at a selected rate of increase. After RF power has reached full power, a process gas including a reactant gas is introduced to deposit the layer. In a preferred embodiment, the reactant gas is tetraethoxysilane. In another preferred embodiment, the process gas further includes fluorine.

US Patent:

6139923, Oct 31, 2000

Filed:

Mar 17, 1999

Appl. No.:

9/271412

Inventors:

Anand Gupta - San Jose CA

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

H05H 124

US Classification:

427579

Abstract:

A method and apparatus for reducing particle contamination in a substrate processing chamber during deposition of a film having at least two layers. The method of the present invention includes the steps of introducing a first process gas into a chamber to deposit a first layer of the film over a wafer at a first selected pressure, introducing a second process gas into the chamber to deposit a second layer of the film over the wafer, and between deposition of said first and second layers, maintaining pressure within the chamber at a pressure that is sufficiently high that particles dislodged by introduction of the second process do not impact the wafer.