Anargyros Krikelis

US Patent:

20180089139, Mar 29, 2018

Filed:

Nov 27, 2017

Appl. No.:

15/823353

Inventors:

- San Jose CA, US
Anargyros Krikelis - San Jose CA, US

International Classification:

G06F 15/76
G06F 15/78

Abstract:

The present invention provides a hybrid programmable logic device which includes a programmable field programmable gate array logic fabric and a many-core distributed processing subsystem. The device integrates both a fabric of programmable logic elements and processors in the same device, i.e., the same chip. The programmable logic elements may be sized and arranged such that place and route tools can address the processors and logic elements as a homogenous routing fabric. The programmable logic elements may provide hardware acceleration functions to the processors that can be defined after the device is fabricated. The device may include scheduling circuitry that can schedule the transmission of data on horizontal and vertical connectors in the logic fabric to transmit data between the programmable logic elements and processor in an asynchronous manner.

US Patent:

20160358653, Dec 8, 2016

Filed:

Jun 8, 2015

Appl. No.:

14/733662

Inventors:

- San Jose CA, US
Anargyros Krikelis - San Jose CA, US

International Classification:

G11C 15/04

Abstract:

An integrated circuit die having hardware processing elements with a configurable embedded search engine for a content addressable memory is disclosed. The circuit die includes an area having hardware processor circuits. A search engine is coupled to the circuit die via an interconnection. The search engine receives requests for data content. A content addressable memory is coupled to the search engine. The content addressable memory is searchable by the search engine in response to a search request from the hardware processor circuit for data content.