Arthur Davis Hunter

US Patent:

6993468, Jan 31, 2006

Filed:

Dec 27, 2000

Appl. No.:

09/750233

Inventors:

David J. Harriman - Portland OR, US
Arthur D. Hunter - Cameron Park CA, US
Arvind B. Iyer - Fair Oaks CA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 17/50

US Classification:

703 14, 703 17

Abstract:

A transaction rule is used to recognize a set of simulation signals obtained from a design simulation as a transaction. An action associated with the transaction rule is executed to produce an output identifying the transaction.

US Patent:

7685346, Mar 23, 2010

Filed:

Jun 26, 2007

Appl. No.:

11/821873

Inventors:

Chee Hak Teh - Penang, MY
Arthur Hunter - Cameron Park CA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 13/14

US Classification:

710244

Abstract:

In one embodiment, the present invention includes a method for arbitrating requests from multiple agents based on an arbitration list to select an agent to receive an arbitration grant, determining whether the selected agent is associated with a grant counter that is at a value of zero, and if so dynamically reordering the arbitration list so that the selected agent is demoted to the lowest portion of the arbitration list. Other embodiments are described and claimed.

US Patent:

8140781, Mar 20, 2012

Filed:

Dec 31, 2007

Appl. No.:

11/967997

Inventors:

Chee Hak Teh - Penang, MY
Arthur D Hunter - Cameron Park CA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G09G 5/39
G06F 13/00
G06F 12/06
G06F 12/00

US Classification:

711158, 345531, 345537, 345538, 345568, 345572, 711105, 711206, 711E12083, 711E12059

Abstract:

The invention relates generally to computer memory access. Embodiments of the invention provide a multi-level page-walk apparatus and method that enable I/O devices to execute multi-level page-walks with an out-of-order memory controller. In embodiments of the invention, the multi-level page-walk apparatus includes a demotion-based priority grant arbiter, a page-walk tracking queue, a page-walk completion queue, and a command packetizer.

US Patent:

20050114564, May 26, 2005

Filed:

Nov 25, 2003

Appl. No.:

10/723135

Inventors:

Zohar Bogin - Folsom CA, US
Brent Chartrand - Cameron Park CA, US
Arthur Hunter - Cameron Park CA, US
Mihir Shah - Philadelphia PA, US

International Classification:

G06F013/00

US Classification:

710033000

Abstract:

Machine-readable media, methods, and apparatus are described to recover from stream under-run and/or over-run conditions. In some embodiments, an audio controller may discard any partial sample block of the stream.

US Patent:

20050114569, May 26, 2005

Filed:

Nov 25, 2003

Appl. No.:

10/723347

Inventors:

Zohar Bogin - Folsom CA, US
Brent Chartrand - Cameron CA, US
Arthur Hunter - Cameron Park CA, US

International Classification:

G06F013/00

US Classification:

710052000

Abstract:

Machine-readable media, methods, and apparatus are described to stream data between a codec and a buffer in system memory and to maintain a value in system memory that is indicative of a current position in the buffer. In some embodiments, an audio controller streams the data across an isochronous channel having relaxed ordering rules to the buffer in the system memory and updates the value indicative of current position via a write across the isochronous channel to the system memory.

US Patent:

20050143843, Jun 30, 2005

Filed:

Nov 25, 2003

Appl. No.:

10/723132

Inventors:

Zohar Bogin - Folsom CA, US
Arthur Hunter - Cameron Park CA, US
Krishnamurthy Venkataramana - Folsom CA, US
Mihir Shah - Philadolphia PA, US

International Classification:

G05B011/01

US Classification:

700020000

Abstract:

Machine-readable media, methods, and apparatus are described to pace commands to codecs. Some embodiments comprise an audio controller that transfers frames to codecs and places commands in the frames at a pace dictated by a command pacer.

US Patent:

20050160188, Jul 21, 2005

Filed:

Jan 20, 2004

Appl. No.:

10/762037

Inventors:

Zohar Bogin - Folsom CA, US
Arthur Hunter - Cameron Park CA, US
Krishnamurthy Venkataramana - Folsom CA, US

International Classification:

G06F003/00

US Classification:

710001000

Abstract:

A method and apparatus for managing memory access requests have been disclosed. One embodiment of the method includes dynamically modifying attributes of each of a number of requests to access one or more memory devices and arbitrating among the requests to select a request to send to the memory devices in a time slot based on the attributes. Other embodiments are described and claimed.

US Patent:

20060074619, Apr 6, 2006

Filed:

Nov 21, 2005

Appl. No.:

11/285565

Inventors:

David Harriman - Portland OR, US
Arthur Hunter - Cameron Park CA, US
Arvind Iyer - San Jose CA, US

International Classification:

G06F 17/50

US Classification:

703013000

Abstract:

A transaction rule is used to recognize a set of simulation signals obtained from a design simulation as a transaction. An action associated with the transaction rule is executed to produce an output identifying the transaction.