Arthur L Morse

US Patent:

49788728, Dec 18, 1990

Filed:

Nov 20, 1989

Appl. No.:

7/437787

Inventors:

Arthur L. Morse - Hawthorne CA
Steve D. Gaalema - Encinitas CA
Ingrid M. Keimel - Fountain Valley CA
Mary J. Hewitt - Playa Del Rey CA

Assignee:

Hughes Aircraft Company - Los Angeles CA

International Classification:

G06G 712
H03K 5159
H03K 500
G01J 500

US Classification:

307490

Abstract:

An amplifier circuit 12 for an infrared detector 10 in a detector array formed on a large-scale integrated structure. The amplifier circuit is fabricated along with the detector on the structure and includes an amplifier stage capacitively coupled 14 to the detector 10 and an output stage. A switching FET 16 is provided to selectively couple the detector to an external biasing source and another switching FET 24 is provided to reset the amplifier stage after an integration period. In one embodiment the output stage 28 includes a storage capacitor 30 selectively coupled to the amplifier stage by a switching FET 32. In another embodiment the output encoding stage 28 includes a two-gate FET 32 to control the voltage on a storage capacitor 30. The two-gate FET controls a voltage source which periodically pulses and drains the capacitor. One FET gate is connected to the amplifier stage output and the other is connected to a clocking signal.

US Patent:

45233268, Jun 11, 1985

Filed:

Jan 17, 1983

Appl. No.:

6/458607

Inventors:

Mary J. Hewitt - Playa del Rey CA
Arthur L. Morse - Manhattan Beach CA

Assignee:

Hughes Aircraft Company - El Segundo CA

International Classification:

G11C 1928
H01L 2978
H01L 2714
H01L 3100

US Classification:

377 58

Abstract:

Noise reduction and dynamic range expansion in a CCD imager is achieved by combining a narrow FAT zero metering gate with a reference column subtraction and CCD charge bailing.

US Patent:

47868317, Nov 22, 1988

Filed:

Dec 17, 1984

Appl. No.:

6/682112

Inventors:

Arthur L. Morse - Hawthorne CA
Steve D. Gaalema - Encinitas CA
Ingrid M. Keimel - Fountain Valley CA
Mary J. Hewitt - Playa Del Rey CA

Assignee:

Hughes Aircraft Company - Los Angeles CA

International Classification:

G06G 712
H03K 342
H03K 5159
G01J 100

US Classification:

307490

Abstract:

An amplifier circuit 12 for an infrared detector 10 in a detector array formed on a large-scale integrated structure. The amplifier circuit is fabricated along with the detector on the structure and includes an amplifier stage capacitively coupled 14 to the detector 10 and an output stage. A switching FET 16 is provided to selectively couple the detector to an external biasing source and another switching FET 24 is provided to reset the amplifier stage after an integration period. In one embodiment the output stage 28 includes a storage capacitor 30 selectively coupled to the amplifier stage by a switching FET 32. In another embodiment the output encoding stage 28 includes a two-gate FET 32 to control the voltage on a storage capacitor 30. The two-gate FET controls a voltage source which periodically pulses and drains the capacitor. One FET gate is connected to the amplifier stage output and the other is connected to a clocking signal.

US Patent:

46848002, Aug 4, 1987

Filed:

Mar 14, 1986

Appl. No.:

6/839398

Inventors:

Arthur L. Morse - Hawthorne CA
Niels A. Thompson - Los Angeles CA

Assignee:

Hughes Aircraft Company - Los Angeles CA

International Classification:

H01J 4014
H01L 2978

US Classification:

250211J

Abstract:

A method and circuit for reading out the detector signal current from an infrared focal plane array by converting the detector current into a precisely proportional charge packet which is injected into the channel of a charge-coupled device (CCD). In a preferred embodiment the circuit comprises a capacitive feedback transimpedance amplifier 30 (or similar infrared detector signal encoding circuit) coupled to a precision CCD charge-injection circuit 10 formed on a semiconducting substrate 12. A surface potential well 50 underneath a reservoir gate electrode 80 is filled with charge that is initially kept in place by a channel stop 14 and a potential barrier 62. When the detector signal is applied to signal gate electrode 60, the potential barrier 62 is lowered and a precisely proportional amount of charge fills a store potential well 48 underneath a store gate electorde 85. At an appropriate time the charge in the storage potential well 48 is transferred to CCD channel 90 by means of a clock pulse applied to a transfer gate electorde 100.