Arthur Ritchie

US Patent:

42617618, Apr 14, 1981

Filed:

Sep 4, 1979

Appl. No.:

6/071965

Inventors:

Shuichi Sato - Beaverton OR
Tadanori Yamaguchi - Portland OR
Arthur D. Ritchie - San Diego CA

Assignee:

Tektronix, Inc. - Beaverton OR

International Classification:

H01L 21265

US Classification:

148 15

Abstract:

Improved, high performance MOS transistors are provided by a method that includes providing an oxygen-impermeable mask on a selected region of a semiconductor substrate, oxidizing the unmasked portion of the surface to provide a thick oxide at least partially recessed in the substrate, which layer includes a smoothly tapered beak that extends between the margin of the mask and the underlying silicon surface, and, after removing the mask, implanting a selected impurity in the substrate beneath the selected region to form a thin impurity layer that terminates at a sloped portion of the substrate formed by the oxidation step.

US Patent:

42175992, Aug 12, 1980

Filed:

Dec 21, 1977

Appl. No.:

5/862715

Inventors:

Shuichi Sato - Beaverton OR
Tadanori Yamaguchi - Portland OR
Arthur D. Ritchie - San Diego CA

Assignee:

Tektronix, Inc. - Beaverton OR

International Classification:

H01L 2978
H01L 2702
H01L 2906

US Classification:

357 23

Abstract:

Improved, high performance MOS transistors are provided by a method that includes providing an oxygen-impermeable mask on a selected region of a semiconductor substrate, oxidizing the unmasked portion of the surface to provide a thick oxide at least partially recessed in the substrate, which layer includes a smoothly tapered beak that extends between the margin of the mask and the underlying silicon surface, and, after removing the mask, implanting a selected impurity in the substrate beneath the selected region to form a thin impurity layer that terminates at a sloped portion of the substrate formed by the oxidation step.