Arthur L Swift

US Patent:

49423193, Jul 17, 1990

Filed:

Jan 19, 1989

Appl. No.:

7/299047

Inventors:

Scott K. Pickett - San Jose CA
Thomas M. Luich - Campbell CA
Arthur L. Swift - Welches OR

Assignee:

National Semiconductor Corp. - Santa Clara CA

International Classification:

H03K 19177

US Classification:

307465

Abstract:

A PLA is organized into a plurality of pages of programmable logic arrays, including means for selecting an appropriate set of one or more of the plurality of pages of programmable logic arrays, including means for selecting an appropriate set of one or more of the plurality of pages for operation at any given time. Means are provided for switching pages when necessary in response to input signals including, if desired, signals fed back from the output leads of the PLA, or internal leads within the PLA. By having only a selected one or more of the pages of the PLA operable at any given time, the number of product and sum terms functioning at any given time is significantly less than the total number of product and sum terms available in the device, thereby minimizing power consumption. Furthermore, by utilizing a paged architecture, speed is increased and power consumption reduced since the number of leads connected to, and thus the capacitance of, the product and/or sum term lines is reduced.

US Patent:

50813757, Jan 14, 1992

Filed:

Jan 2, 1991

Appl. No.:

7/636592

Inventors:

Scott K. Pickett - San Jose CA
Thomas M. Luich - Campbell CA
Arthur L. Swift - Welches OR

Assignee:

National Semiconductor Corp. - Santa Clara CA

International Classification:

H03K 19177

US Classification:

307465

Abstract:

A PLA is formed using configurable logic elements. A plurality of pages are used to store information defining logic configuration patterns required to perform desired logical functions. The configurable logic elements are configured by downloading information from a desired one or more of said pages. If desired, page control is achieved in response to input signals to the configurable logic array.