Asher S Lazarus

age ~47

from Austin, TX

Also known as:
  • Rebecca R Lazarus
  • Shlomo Lazarus Asher
  • Asher Shlomo Lazaras
  • Asher Reice
  • Rebecca R Reice
  • Lazarus Asher
Phone and address:
11518 Sierra Nevada, Austin, TX 78759
5125604660

Asher Lazarus Phones & Addresses

  • 11518 Sierra Nevada, Austin, TX 78759 • 5125604660
  • Overland Park, KS
  • Los Angeles, CA
  • 2410 Willow Glen Dr, Baltimore, MD 21209
  • College Park, MD
  • Hyattsville, MD
  • 11700 Grant St, Overland Park, KS 66210

Work

  • Company:
    Qualcomm
    Apr 2015
  • Position:
    Physical design engineer

Education

  • Degree:
    Bachelors, Bachelor of Science
  • School / High School:
    University of Maryland
    1996 to 2000
  • Specialities:
    Electrical Engineering, Computer Science

Skills

Debugging • Perl • Static Timing Analysis • Computer Architecture • Verilog • Asic • C++ • Functional Verification • Unix • Logic Design

Industries

Computer Hardware

Us Patents

  • System And Method For Thermal Monitoring Of Ic Using Sampling Periods Of Invariant Duration

    view source
  • US Patent:
    7197419, Mar 27, 2007
  • Filed:
    Feb 3, 2005
  • Appl. No.:
    11/050324
  • Inventors:
    Michael Stephen Floyd - Austin TX, US
    Asher Shlomo Lazarus - Austin TX, US
    Brian Chan Monwai - Austin TX, US
  • Assignee:
    International Business Machines Corporation - Armonk NY
  • International Classification:
    G06F 17/40
  • US Classification:
    702130, 702132, 713322, 713501, 374100, 323907
  • Abstract:
    A system and method are provided for monitoring temperature within a specified integrated circuit. Usefully, the system comprises at least one oscillator device proximate to the integrated circuit for generating signal pulses at a frequency that varies as a function of the temperature adjacent to the oscillator device. The system further comprises a control unit for establishing sample acquisition periods of invariant time duration based on an time invariant reference clock. A sampling component is coupled to count the number of pulses generated by the oscillator device during each of a succession of the time invariant sample acquisition periods, and a threshold component responsive to the respective count values for the succession of sample acquisition periods provides notice when at least some of the count values have a value associated with a prespecified excessive temperature level.
  • Techniques For Performing A Logic Built-In Self-Test In An Integrated Circuit Device

    view source
  • US Patent:
    7873890, Jan 18, 2011
  • Filed:
    Jun 30, 2008
  • Appl. No.:
    12/164699
  • Inventors:
    Abel Alaniz - Austin TX, US
    Robert B. Gass - Pflugerville TX, US
    Asher S. Lazarus - Austin TX, US
  • Assignee:
    International Business Machines Corporation - Armonk NY
  • International Classification:
    G01R 31/28
    G01R 31/02
    G01R 31/26
  • US Classification:
    714732, 714724, 714726, 714729, 714733, 714736, 714738, 714739, 714742, 324759, 324763, 324765
  • Abstract:
    A method, system and computer program product for performing device characterization Logic Built-In Self-Test (LBIST) in an IC device. Test parameters of the LBIST are saved in a memory of the IC device, and nominal operational parameters of the IC device are used to define a signature of the LBIST. A determination whether the LBIST is passed or failed is made within the characterized IC device.
  • Method And System For Testing An Electronic Circuit To Identify Multiple Defects

    view source
  • US Patent:
    7895490, Feb 22, 2011
  • Filed:
    May 20, 2008
  • Appl. No.:
    12/123547
  • Inventors:
    Benjamin Robert Gass - Pflugerville TX, US
    Abel Alaniz - Cedar Park TX, US
    Asher Shlomo Lazarus - Austin TX, US
    Timothy M. Skergan - Austin TX, US
  • Assignee:
    International Business Machines Corporation - Armonk NY
  • International Classification:
    G01R 31/28
  • US Classification:
    714732, 714726, 714733
  • Abstract:
    A method for testing an electronic circuit comprises selecting a plurality of test patterns arranged in an order. The method tests an electronic circuit by applying to the electronic circuit a first subset range of the plurality of test patterns sequentially in the order, from a first test pattern to a first log interval after the first test pattern, thereby generating a first associated output. The method compares the first associated output with a first known output of the plurality of known outputs. In the event the first associated output does not match the first known output, the method stores indicia of the first mismatch; causes the electronic circuit to appear to assume the first known output state; and proceeds with additional test procedures.
  • Method And System For Lbist Testing Of An Electronic Circuit

    view source
  • US Patent:
    8086925, Dec 27, 2011
  • Filed:
    May 20, 2008
  • Appl. No.:
    12/123540
  • Inventors:
    Benjamin Robert Gass - Pflugerville TX, US
    Abel Alaniz - Cedar Park TX, US
    Asher Shlomo Lazarus - Austin TX, US
    Timothy M. Skergan - Austin TX, US
  • Assignee:
    International Business Machines Corporation - Armonk NY
  • International Classification:
    G01R 31/28
  • US Classification:
    714738
  • Abstract:
    A method for testing an electronic circuit comprises selecting a first log interval, a first log start pattern, a first log end pattern, and a first subset range of LBIST patterns from a plurality of LBIST patterns arranged in an order, wherein each LBIST pattern of the subset range of LBIST patterns causes an associated output of an electronic circuit. The method tests an electronic circuit in a first test by applying to the electronic circuit the first subset range of LBIST patterns sequentially in the order, thereby generating a first plurality of associated outputs. The method stores a first subset of associated outputs based on the first log interval, the first log start pattern, and the first log end pattern. The method compares the subset of associated outputs with known outputs to identify a first output mismatch.
  • Proactive Automated Calibration Of Integrated Circuit Interface

    view source
  • US Patent:
    20040225461, Nov 11, 2004
  • Filed:
    Apr 28, 2003
  • Appl. No.:
    10/425395
  • Inventors:
    Michael Floyd - Austin TX, US
    Asher Lazarus - Austin TX, US
  • Assignee:
    International Business Machines Corporation
  • International Classification:
    G06F003/00
  • US Classification:
    702/085000, 710/060000, 714/047000, 702/099000
  • Abstract:
    An integrated circuit device and system of devices in which a device interface incorporates dynamic, elastic calibration facilities. The interface includes a calibration manager and circuitry for monitoring the interface signals to detect the presence of signal skew, delay, or other degradation. If the monitor detects an out-of-calibration interface, the calibration manager initiates a dynamic calibration procedure. The calibration manager can also initiate the dynamic calibration procedure in response to an event such as the detection of a correctable error on the interface. By proactively monitoring the interface for degradation, the calibration manager is responsive to environmental changes as they occur and is efficient in its use of the calibration procedure by invoking it only when calibration is required.

Resumes

Asher Lazarus Photo 1

Physical Design Engineer

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Location:
Overland Park, KS
Industry:
Computer Hardware
Work:
Qualcomm
Physical Design Engineer

Ibm Jul 2011 - Mar 2015
Advisory Engineer

Ibm Jun 2005 - Jul 2011
Staff Engineer

Ibm Jun 2000 - Jun 2005
Engineer
Education:
University of Maryland 1996 - 2000
Bachelors, Bachelor of Science, Electrical Engineering, Computer Science
Skills:
Debugging
Perl
Static Timing Analysis
Computer Architecture
Verilog
Asic
C++
Functional Verification
Unix
Logic Design

Facebook

Asher Lazarus Photo 2

Asher Lazarus

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Youtube

Reel People Feat. Nathan Haines - Spiritual

Hailing from Londons East End, Oli Lazarus spent three years of musica...

  • Category:
    Music
  • Uploaded:
    12 Sep, 2008
  • Duration:
    6m 23s

Phil Asher feat. Shea Soul - Can't Go Back

www.traxsource.c... Shea Soul and Phil Asher team up once more for re...

  • Category:
    Music
  • Uploaded:
    19 Jan, 2011
  • Duration:
    5m 43s

Bah Samba Live @ Groove Sanctuary 25th July P...

Bah Samba Live PATRICK FORGE, PHIL ASHER, KEVIN BEADLE, BOPSTAR, FAZE ...

  • Category:
    Music
  • Uploaded:
    26 Jul, 2010
  • Duration:
    8m

Bah Samba Live @ Groove Sanctuary, 25th July ...

Bah Samba Live PATRICK FORGE, PHIL ASHER, KEVIN BEADLE, BOPSTAR, FAZE ...

  • Category:
    Music
  • Uploaded:
    26 Jul, 2010
  • Duration:
    6m

Asher has Cake

Asher's First Birthday, Outback, Asher loves his Ice Cream.

  • Category:
    People & Blogs
  • Uploaded:
    07 Mar, 2009
  • Duration:
    3m 3s

Bah Samba @ Groove Sanctuary, 25th July Pt.4....

Bah Samba Live PATRICK FORGE, PHIL ASHER, KEVIN BEADLE, BOPSTAR, FAZE ...

  • Category:
    Music
  • Uploaded:
    26 Jul, 2010
  • Duration:
    4m 39s

Googleplus

Asher Lazarus Photo 3

Asher Lazarus

Asher Lazarus Photo 4

Asher Lazarus

Work:
IBM - Engineer
Education:
University of Maryland, College Park

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