Ben L Armstrong

US Patent:

20170311440, Oct 26, 2017

Filed:

Apr 19, 2017

Appl. No.:

15/491727

Inventors:

- Pullman WA, US
Ben M. Armstrong - Pullman WA, US
Forrest A. Rahrer - Palouse WA, US

Assignee:

Schweitzer Engineering Laboratories, Inc. - Pullman WA

International Classification:

H05K 1/02
H05K 1/02
H05K 1/11
H05K 3/40

Abstract:

The present disclosure relates to systems and methods using thermal vias to increase the current-carrying capacity of conductive traces on a multilayered printed circuit board (PCB). In various embodiments, parameters associated with vias may be selected to control various electrical and thermal properties of the conductive trace. Such parameters include the via diameter, a plating thickness, a number of vias, a placement of the vias, an amount of conductive material to be added or removed from the conductive trace, a change in the resistance of the conductive trace, a change in a fusing measurement of the conductive trace, and the like.