Benjamin J Brown

US Patent:

20220368768, Nov 17, 2022

Filed:

Oct 1, 2021

Appl. No.:

17/492530

Inventors:

- Cupertino CA, US
Benjamin W. BROWN - Cupertino CA, US
Chiraag SUMANTH - Sunnyvale CA, US
Gokcen CILINGIR - Cupertino CA, US
Joseph E. MEYER - Fremont CA, US
Rafael Marques MARTINS - Campbell CA, US
Roberto GARCIA - Cupertino CA, US
Sara QIAM - San Francisco CA, US

International Classification:

H04L 29/08
G06N 5/04
G06N 5/02

Abstract:

The subject technology provides systems and methods for context-based user status indicator selection. In an example, a method includes obtaining, by a first electronic device associated with a first user, status indicators, each of which indicates a respective status of a second user of a second electronic device. Furthermore, the method includes determining, by the first electronic device, a respective relevance priority of each of the status indicators. Based on the determined respective priorities, a subset of the status indicators is selected by the first electronic device and is displayed in a graphical element on the first electronic device.

US Patent:

20200028662, Jan 23, 2020

Filed:

Jul 2, 2019

Appl. No.:

16/459701

Inventors:

- Lowell MA, US
Benjamin Brown - Santa Clara CA, US

International Classification:

H04L 7/033
H03L 7/093
H03L 7/07
H03L 7/14

Abstract:

A digital PLL, which can be a virtual PLL, can condition digital phase information, comprising phase modification requests, for transfer, jitter, and phase-noise filtering of clock information between a clock recovery unit and a clock generation unit associated with phase interpolators. The digital PLL can employ a set of accumulators, proportional and integral filter component, generator component, feedback path between the output and input of the digital PLL, and other digital signal processing components. The proportional and integral filter component can be configurable to set a loop damping factor and a loop bandwidth of the filter, based on respective parameters. Based on the filter output, the generator component can generate output phase information, comprising phase modification requests, that can be transmitted to another phase interpolator(s) associated with a transmitter or other component(s) of the device to facilitate generating a clock for the transmitter or other component(s).