Brian A Floyd

US Patent:

6930546, Aug 16, 2005

Filed:

Sep 26, 2003

Appl. No.:

10/671984

Inventors:

Brian Allan Floyd - Cortlandt Manor NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H03F001/14

US Classification:

330 51, 330151

Abstract:

A bypass switch topology for a low-noise amplifier is provided. In one aspect of the invention, an amplifier includes at least one signal amplifying transistor, coupled between an input terminal and an output terminal associated with the amplifier, for amplifying a received input signal. The amplifier also includes a bypass switch, coupled to the at least one signal amplifying transistor, for providing a gain (e. g. , high-gain) mode operation and a bypass mode operation, the bypass switch including two transistors. In the gain mode operation, the two transistors of the bypass switch are off and the at least one signal amplifying transistor amplifies the received input signal and passes the amplified signal to the output terminal. In the bypass mode operation, the two transistors of the bypass switch are on, the at least one signal amplifying transistor is turned off, and the received input signal is passed directly from the input terminal to the output terminal.

US Patent:

7187251, Mar 6, 2007

Filed:

Mar 16, 2005

Appl. No.:

11/081237

Inventors:

Mohan K. Chirala - College Station TX, US
Brian A. Floyd - Cortlandt Manor NY, US
Thomas M. Zwick - Kisslegg, DE

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01P 5/12
H01P 5/22

US Classification:

333120, 333154, 333161

Abstract:

A direct current (DC) isolated phase inverter and a ring hybrid coupler including the DC isolated phase inverter is provided. The ring hybrid coupler including the DC isolated phase inverter comprising: a first, second, third and fourth transmission line arm; a first port connected to the first arm, second port connected to the second arm, third port connected to the third arm and fourth port connected to the fourth arm; and a DC phase inverter inserted within one of the first, second, third and fourth arms, wherein the DC phase inverter comprises: a transmission line comprising a plurality of signal and ground traces, wherein the plurality of signal and ground traces are interchanged; and a plurality of capacitors disposed in series with the ground traces, wherein the plurality of capacitors isolate the DC phase inverter from a device connected to the transmission line.

US Patent:

7199658, Apr 3, 2007

Filed:

May 18, 2005

Appl. No.:

11/131534

Inventors:

Brian A. Floyd - Cortlandt Manor NY, US
Alberto Valdes Garcia - College Station TX, US
Ullrich R. Pfeiffer - Yorktown Heights NY, US
Scott Kevin Reynolds - Granite Springs NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H03F 3/217

US Classification:

330251, 330302

Abstract:

Circuits and methods are provided for implementing highly efficient switch-mode power amplifiers using BJTs (bipolar junction transistors) as active switching devices at millimeter-wave frequencies. More specifically, circuits and methods are provided for driving power amplifiers with BJT switching devices to achieve highly efficient switch-mode (e. g. , Class E) operation at millimeter wave frequencies (e. g. , 60 GHz).

US Patent:

7265630, Sep 4, 2007

Filed:

Dec 9, 2003

Appl. No.:

10/731341

Inventors:

Brian Allan Floyd - Cortlandt Manor NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H03F 3/191

US Classification:

330302, 330310, 330311

Abstract:

Principles of the present invention provide improved amplifiers such as low-noise amplifiers. While such amplifiers may be suitable in many applications, such amplifiers may provide improved noise, gain and stability performance at millimeter-wave frequencies. In a first aspect of the invention, an amplifier includes a first amplifying stage including a common-base transistor, and a second amplifying stage, coupled to the first amplifying stage, including a cascode transistor pair. The amplifier may be implemented in accordance with a silicon-based technology (e. g. , silicon germanium) and may employ microstrip shunt-stub transmission lines as matching networks.

US Patent:

7265644, Sep 4, 2007

Filed:

Apr 1, 2005

Appl. No.:

11/096419

Inventors:

Brian A. Floyd - Cortlandt Manor NY, US
Thomas M. Zwick - Kisslegg, DE

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01P 5/10
H03H 7/42

US Classification:

333 26, 333 33

Abstract:

An ultra-broadband balun is provided. The balun comprises: a first unbalanced transmission line comprising a first ground trace and a signal trace; and a balanced transmission line comprising a first and second signal trace, wherein the first signal trace of the balanced transmission line is connected to the first ground trace of the first unbalanced transmission line and the second signal trace of the balanced transmission line is connected to the signal trace of the first unbalanced transmission line, wherein a first capacitor is disposed in series with one of the first ground trace of the first unbalanced transmission line and the first signal trace of the balanced transmission line.

US Patent:

7315212, Jan 1, 2008

Filed:

Sep 13, 2005

Appl. No.:

11/226534

Inventors:

Brian A. Floyd - Mahopac NY, US
David Goren - Nesher, IL
Ullrich R. Pfeiffer - Yorktown Heights NY, US
Scott Kevin Reynolds - Amawalk NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H03F 3/04

US Classification:

330305, 330307, 330165

Abstract:

Circuits and methods are provided for building integrated transformer-coupled amplifiers with on-chip transformers that are designed to resonate or otherwise tune parasitic capacitances to achieve frequency tuning of amplifiers at millimeter wave operating frequencies.

US Patent:

7352325, Apr 1, 2008

Filed:

Jan 2, 2007

Appl. No.:

11/619019

Inventors:

Brian Allan Floyd - Mahopac NY, US
Arun Sridhar Natarajan - Pasadena CA, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01Q 3/00

US Classification:

342372

Abstract:

Improved phased array techniques and architectures are provided. For example, a linear phased array includes N discrete phase shifters and N−1 variable phase shifters, wherein the N−1 variable phase shifters are respectively coupled between adjacent output nodes of the N discrete phase shifters such that the N discrete phase shifters reduce an amount of continuous phase shift provided by the N−1 variable phase shifters. Each of the N discrete phase shifters may select between two or more discrete phase shifts. The N discrete phase shifters also preferably eliminate a need for a variable termination impedance in the linear phased array.

US Patent:

7386291, Jun 10, 2008

Filed:

Sep 2, 2003

Appl. No.:

10/653539

Inventors:

Brian Allan Floyd - Cortlandt Manor NY, US
Ullrich Richard Pfeiffer - Carmel NY, US
Scott Kevin Reynolds - Granite Springs NY, US
Thomas Martin Zwick - West Harrison NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H04B 1/10

US Classification:

455313, 455323, 455324, 455314, 455315, 455205

Abstract:

An off-chip signal is provided to a differential branch-line directional coupler implemented entirely on-chip. The coupler produces differential quadrature signals, which are then buffered and applied to a quadrature mixer. The coupler is implemented entirely on-chip using microstrip transmission lines. The coupler is made up of a plurality of rings and a plurality of underpasses connecting ports of the rings, wherein each of the plurality of rings is made up of four branch lines, and each branch line having an electrical length of one-quarter wavelength at the center design frequency. Coupling between the plurality of branch lines of the rings may be varied.