Brian Harold Floyd

US Patent:

6444527, Sep 3, 2002

Filed:

Jan 11, 2000

Appl. No.:

09/481135

Inventors:

Brian H. Floyd - Sunnyvale CA
Fwu-Iuan Hshieh - Saratoga CA
Mike F. Chang - Cupertino CA

Assignee:

Siliconix incorporated - Santa Clara CA

International Classification:

H01L 21336

US Classification:

438268, 438270, 438138, 438589

Abstract:

A trenched field effect transistor suitable especially for low voltage power applications provides low leakage blocking capability due to a gate controlled barrier region between the source region and drain region. Forward conduction occurs through an inversion region between the source region and drain region. Blocking is achieved by a gate controlled depletion barrier. Located between the source and drain regions is a fairly lightly doped body region. The gate electrode, located in a trench, extends through the source and body regions and in some cases into the upper portion of the drain region. The dopant type of the polysilicon gate electrode is the same type as that of the body region. The body region is a relatively thin and lightly doped epitaxial layer grown upon a highly doped low resistivity substrate of opposite conductivity type. In the blocking state the epitaxial body region is depleted due to applied drain-source voltage, hence a punch-through type condition occurs vertically.

US Patent:

7595683, Sep 29, 2009

Filed:

Nov 15, 2007

Appl. No.:

11/985457

Inventors:

Brian H. Floyd - Sunnyvale CA, US

Assignee:

Fairchild Semiconductor Corporation - South Portland ME

International Classification:

G05F 1/10

US Classification:

327536

Abstract:

In one embodiment, a charge pump system includes an input terminal at which an input voltage is received, and an output terminal at which at an output voltage is provided. N stages are connected in cascade between the input terminal and the output terminal. Each of the N stages includes at most one inverter circuit, the inverter circuit having a first transistor connected at a node to a second transistor. A first capacitor is coupled at one end to the node between the first and second transistors, and is coupled at another end to receive one of two non-overlapping phase signals. In each stage, at one value for the one of two non-overlapping phase signals, the first capacitor of the stage is charged by a respective stage input voltage, and at another value for the one of two non-overlapping phase signals the first capacitor of the stage is discharged to provide a respective stage output voltage. The charge pump system is capable of generating the output voltage with a greater magnitude than the input voltage even when the supply voltage is relatively low, e. g. , below 1V.

US Patent:

7837384, Nov 23, 2010

Filed:

Dec 19, 2007

Appl. No.:

12/004279

Inventors:

Brian H. Floyd - Sunnyvale CA, US

Assignee:

Fairchild Semiconductor Corporation - South Portland ME

International Classification:

G01K 7/00

US Classification:

374178, 327512

Abstract:

In one embodiment, an integrated circuit is provided for detecting when a temperature reaches a specified value. The circuit includes a differential circuit block having first and second transistors. A control terminal of the first transistor is coupled to a first voltage source, and a control terminal of the second transistor is coupled to a second voltage source. The second transistor has an area larger than the first transistor. The differential circuit block compares a first current flowing into the first transistor and a second current flowing into the second transistor. The differential circuit block outputs a signal to indicate that the specified temperature has been reached when the first current equals the second current according to specified values of the first voltage source, the second voltage source, and the ratio of the areas of the first and second transistors. A single-ended circuit block amplifies the output signal of the differential circuit block to a predetermined amplitude.

US Patent:

8076968, Dec 13, 2011

Filed:

Mar 9, 2009

Appl. No.:

12/400659

Inventors:

Brian H. Floyd - Sunnyvale CA, US

Assignee:

Fairchild Semiconductor Corporation - South Portland ME

International Classification:

G05F 1/10

US Classification:

327536

Abstract:

In an embodiment, a charge pump of relatively simple design is provided which can generate sufficient drive voltage for a power switching device from a low-supply-voltage (e. g. , 1V). In some embodiments, this charge pump performs better at lower input voltages when there are loading conditions (i. e. , when the charge-pump output powers other circuit blocks such as amplifiers and LDO's).

US Patent:

8350599, Jan 8, 2013

Filed:

Mar 18, 2011

Appl. No.:

13/051808

Inventors:

Brian Harold Floyd - Sunnyvale CA, US

Assignee:

Aptus Power Semiconductors - Los Altos CA

International Classification:

H03K 5/22

US Classification:

327 71, 327 63, 327 69, 327 70

Abstract:

A voltage comparator, comprises: a first branch comprising a first transistor, a first resistor (R), and a first current dependent voltage source (VA), wherein a first voltage (V) is applied across the first branch to generate a first current and wherein the first transistor is a diode-connected transistor; a second branch comprising a second resistor (R), a second current dependent voltage source (VB), and a second transistor having a control voltage (V), wherein a second voltage (V) is applied on an end of the second branch to generate a second current; and a third branch for generating a comparator output, wherein a trip point of the comparator output is set to when the first current and the second current are equal and wherein the trip point is a function of the transistors, the resistors, and the current dependent voltage sources of the first branch and the second branch.

US Patent:

8441307, May 14, 2013

Filed:

Aug 11, 2010

Appl. No.:

12/854777

Inventors:

Brian Harold Floyd - Sunnyvale CA, US

Assignee:

Aptus Power Semiconductor - Los Altos CA

International Classification:

G05F 1/10

US Classification:

327536, 363 60

Abstract:

A charge pump circuit comprises a plurality of subcircuits, where the subcircuits are connected to each other in a single or a dual array having a repeating pattern. Each of the subcircuits comprises one or more of the following: an X-channel device having an X-gate terminal, an X-source terminal and an X-drain terminal, a Y-channel device having a Y-gate terminal, a Y-source terminal and a Y-drain terminal, and a capacitor; wherein a first end of the capacitor, the X-drain terminal, and the Y-drain terminal are connected with each other to form the common drain terminal; and wherein a second end of the capacitor is the clock terminal.

US Patent:

8487660, Jul 16, 2013

Filed:

Oct 19, 2011

Appl. No.:

13/277188

Inventors:

Brian Harold Floyd - Sunnyvale CA, US

Assignee:

Aptus Power Semiconductor - Los Altos CA

International Classification:

H03K 5/153

US Classification:

327 72, 327205, 327 83, 327513, 327138, 327323, 327512

Abstract:

A temperature stable comparator circuit, comprised of: a branch C having a first end, a second end, a first type- device and first type- device, wherein the first type- device and the first type- device are connected to a node O; a branch B having a first end, a second end, a second type- device, a second type- device, and a resistor; and a branch A having a first end, a second end, a third type- device and a current-control device; wherein the first ends of the branch A, branch B, and branch C are commonly connected, and the second ends of the branch B and branch C are commonly connected.

US Patent:

8487689, Jul 16, 2013

Filed:

Jan 6, 2011

Appl. No.:

12/986155

Inventors:

Brian Harold Floyd - Sunnyvale CA, US

Assignee:

Aptus Power Semiconductor - Los Altos CA

International Classification:

G05F 1/10
G05F 3/02

US Classification:

327536, 327427

Abstract:

A method for operating a load switch, wherein a charge pump drives a gate of the load switch, comprises the steps of: controlling a charge pump frequency as a function of states of the load switch; generating a charge pump output as a function of the charge pump frequency; and providing the charge pump output to the gate of the load switch.