Brian D Hughes

US Patent:

8560925, Oct 15, 2013

Filed:

Apr 5, 2011

Appl. No.:

13/079875

Inventors:

Brian William Hughes - Rochester Hills MI, US
Hiroaki Shibata - Novi MI, US
Wan-ping Yang - Farmington Hills MI, US

Assignee:

DENSO International America, Inc. - Southfield MI
Denso Corporation - Kariya-shi, Aichi-ken

International Classification:

G11C 29/00

US Classification:

714773

Abstract:

A method and system for detecting and correcting a bad bit error in a solid-state nonvolatile memory device. The device includes a bad bit detection module that receives an old page from the memory device and determines whether a page has a bad bit. The device further includes a bad bit correction module that generates a new page, determines a location of the bad bit, determines a preferred value of the bad bit, determines a user value of the bad bit and inserts the preferred value into a string of bits corresponding to substantive data of the old page, recording the string of bits with the preferred value inserted therein and stores the new page at an address of the old page.

US Patent:

20120246525, Sep 27, 2012

Filed:

Mar 21, 2011

Appl. No.:

13/052305

Inventors:

Hiroaki Shibata - Novi MI, US
Koji Shinoda - Farmington Hills MI, US
Brian Hughes - Rochester Hills MI, US

Assignee:

DENSO CORPORATION - Kariya-Shi
DENSO INTERNATIONAL AMERICA, INC. - Southfield MI

International Classification:

G06F 11/07

US Classification:

714704, 714E11023

Abstract:

A method for initiating a refresh operation of a solid-state nonvolatile memory device coupled to a processor is disclosed. The method comprises determining an error number for a block of the solid-state nonvolatile memory. The error number corresponds to an amount of error bits in a page of the block having a greatest amount of error bits. The method further comprises comparing the error number with an error threshold and determining a reset number indicating an amount of times that the processor has been reset since a previous refresh operation was performed on the block of the solid-state nonvolatile memory. The method further includes comparing the number of resets with a reset threshold and refreshing the block of the solid-state nonvolatile memory when the number of errors exceeds the error threshold and the number of resets exceeds the reset threshold.