Brian D Koehler

US Patent:

20060190642, Aug 24, 2006

Filed:

Feb 24, 2005

Appl. No.:

11/064752

Inventors:

Alfredo Aldereguia - Cary NC, US
Brian Koehler - Rochester MN, US
Grace Richter - Chapel Hill NC, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 3/06

US Classification:

710060000

Abstract:

A data receiver circuit in a receiving chip provides the capability to characterize an interface, which includes one or more inter-chip communication lines, between a transmitting chip and the receiving chip by transmitting the data across a primary data path and a secondary data path, latching the data in the secondary data path using a clock signal that is skewed relative to a clock signal used to latch the primary data path, comparing the data latched from the primary and secondary data paths, and recording errors. Because the primary data path is not impacted by the test cycle, the test cycle may be run while data associated with applications running on the system are transmitted across the inter-chip communication lines.