Brian David Short

US Patent:

52010562, Apr 6, 1993

Filed:

May 2, 1990

Appl. No.:

7/517865

Inventors:

Samuel M. Daniel - Tempe AZ
Brian K. Short - Tempe AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

G06F 700
G06F 1500

US Classification:

395800

Abstract:

A RICS microprocessor architecture is provided with a plurality of data registers and instruction registers each having a multi-bit extension for extending the width of the data and instruction words processed therethrough. A first plurality of bits within a tag field of the multi-bit extension are reserved for identifying the data type of the data words while a second plurality of bits provide instruction dependent control. The multi-bit extension allows full precision computation for the data words requiring the tag field to identify the data type thereof while retaining full precision compatibility for data words not needing tag field identifiers. At least two bits of the first plurality of bits in tag field are reserved for identifying one of several primary categories of data types and at least two bits identify one of several subtype categories within each of the plurality of primary categories. An extended set of machine instructions is also provided for efficient usage of the multi-bit extension appended to the data and instruction registers.