Rafi Rahamim - Orange CA Brian Stroud - Santa Ana CA
Assignee:
PCTEL, Inc. - Chicago IL
International Classification:
H04M 100
US Classification:
37939901, 379412
Abstract:
A relay-less telephone line interface circuit is disclosed which incorporates a low-voltage transistor to suppress high-voltage, short-term voltage surges. Specifically, a low-voltage transistor such as a Central Semiconductor C2TA44, a Motorola MPSA42, or similar such transistors actually can withstand a high-voltage spike exceeding the manufacturers specified parameters. The present circuit exploits this undocumented feature by employing such a transistor in combination with a metal oxide varistor in order to provide adequate voltage surge protection for the interface circuit. Thus, a zenor diode is not necessary (avoiding on-hook problems) and the relay-less circuit still passes the FCC Part 68 test.
Raphael Rahamim - Orange CA Brian D. Stroud - Santa Ana CA
Assignee:
Conexant Systems, Inc. - Newport Beach CA
International Classification:
H04M 1100 H02H 900
US Classification:
379412
Abstract:
An improved surge protection circuit for withstanding surges is provided. A first node is provided for coupling to a tip lead, and second node is provided for coupling to a ring lead. The surge protection circuit has a first current path for turning on a first transistor, and a second current path for redirecting current from the remaining excess surge energy from one lead to the other lead. The first current path further includes a first sub-path to direct the initial voltage surge to the base electrode of the first transistor to cause the first transistor to turn on hard. The second sub-path redirects current from the initial excess surge energy from the voltage surge to a capacitor prior to the time before the first transistor is fully turned on, so as to protect the base-emitter junction of a second transistor from being reverse biased. The second current path according to the present invention includes the first transistor and a resistor having a first terminal coupled to the emitter electrode of the first transistor and a second terminal coupled to the second node. When the first transistor is fully turned on, the remaining excess voltage is redirected from the tip ring to the lead ring to protect the other circuit elements from damage.