Bruce E Moolenaar

US Patent:

56734158, Sep 30, 1997

Filed:

Aug 14, 1996

Appl. No.:

8/698212

Inventors:

Kha Nguyen - Anaheim CA
Theodore Curt White - Tustin CA
Bruce Edward Moolenaar - Laguna Niguel CA

Assignee:

Unisys Corporation - Blue Bell PA

International Classification:

G06F 1200
G06F 1300

US Classification:

395476

Abstract:

In accordance with the present invention, a high speed two-part storage interface unit includes--1) a primary I/O port (input/output port) that couples to a plurality of data processing modules; 2) a secondary I/O port that couples to a main memory module, 3) input circuits for receiving three types of write commands and one type of read command from the data processing modules, 4) several write execution modules which are serially-coupled to a time-shared memory, and 5) a control circuit by which the write commands and read commands are performed. In one preferred embodiment, write commands are executed over several clock cycles by passing each such command with its write data word through the write execution modules in a pipelined fashion; read commands are executed at a rate of one command per clock cycle; a read command temporarily preempts the execution of any write command; an interrupt signal on the secondary I/O port stops the execution of read commands and write commands from the primary I/O port and enables data words to be transferred on the secondary I/O port; and write commands can be received on the primary I/O port while data is being transferred on the secondary I/O port.