Michael F. Winthrop - Sterling VA Buddy L. Holmes - Ocean Springs MS
Assignee:
The United States of America as represented by the Secretary of the Air Force - Washington DC
International Classification:
G09B 2300
US Classification:
434219
Abstract:
A maintenance training system capable of precisely simulating both the inner and the outward functions of original electronic equipment is realized by utilizing a programmable waveform generator, a microcomputer and interfacing input/output circuits in a modular design that can be adapted to use with virtually any desired electronic system maintenance trainer. The system provides genuine waveform generation and display in a real time maintenance trainer with positive input/output control through line replacable unit read/write modules. The programmable waveform generator develops analog waveforms from digital control and picture data received from the micro-computer. The analog outputs of the programmable waveform generator drive the maintenance trainer's external meters, displays and oscilloscope and can be programmed to simulate point by point circuit tracing of the original electronic equipment.
The United States of America as represented by the Secretary of the Air Force - Washington DC
International Classification:
G06F 300
US Classification:
364900
Abstract:
Switch contacts are monitored by a computer for change of status (open or closed) without polling them. The apparatus comprises an input port module and up to eight switch reader modules, with 128 switch contacts to each. The input port module has four Z80 PIOs providing a total of eight ports for the switch reader modules, and a S-100 bus to the computer. In each switch reader module, in a RUN mode, the operation is to address the switch contacts sequentially and via a latch to load the status as data into a 128-bit shift register, and then to compare the current and previous states represented by the inputs and outputs of the shift register. If the switch contact being addressed has changed state, the comparator generates an interrupt to the processor. At the same time that an interrupt is generated, a scan inhibit command is supplied from a comparator to stop a clock. Data from an address counter and the latch are supplied via the input port module to the processor.