Calvin Wade Sheen from La Mesa, CA, age 63

Epitaxial Formation Support Structures And Associated Methods
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US Patent:

8187901, May 29, 2012
Filed:

Dec 6, 2010
Appl. No.:

12/961370
Inventors:

Calvin Wade Sheen - Derry NH, US
Assignee:

Micron Technology, Inc. - Boise ID
International Classification:

H01L 21/00
US Classification:

438 46, 438458, 257E21497
Abstract:

Epitaxial formation support structures and associated methods of manufacturing epitaxial formation support structures and solid state lighting devices are disclosed herein. In several embodiments, a method of manufacturing an epitaxial formation support substrate can include forming an uncured support substrate that has a first side, a second side opposite the first side, and coefficient of thermal expansion substantially similar to N-type gallium nitride. The method can further include positioning the first side of the uncured support substrate on a first surface of a first reference plate and positioning a second surface of a second reference plate on the second side to form a stack. The first and second surfaces can include uniformly flat portions. The method can also include firing the stack to sinter the uncured support substrate. At least side of the support substrate can form a planar surface that is substantially uniformly flat.

Quantum Tunneling Devices And Circuits With Lattice-Mismatched Semiconductor Structures
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US Patent:

8216951, Jul 10, 2012
Filed:

Dec 20, 2010
Appl. No.:

12/973616
Inventors:

Zhiyuan Cheng - Lincoln MA, US
Calvin Sheen - Derry NH, US
Assignee:

Taiwan Semiconductor Manufacturing Company, Ltd. - Hsin-Chu
International Classification:

H01L 21/04
US Classification:

438979, 438143, 438407, 438511, 438797, 257E21353, 257E21367, 257E21404
Abstract:

Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.

Semiconductor Sensor Structures With Reduced Dislocation Defect Densities
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US Patent:

8253211, Aug 28, 2012
Filed:

Sep 24, 2009
Appl. No.:

12/565863
Inventors:

Zhiyuan Cheng - Lincoln MA, US
James G. Fiorenza - Wilmington MA, US
Calvin Sheen - Derry NH, US
Anthony Lochtefeld - Ipswich MA, US
Assignee:

Taiwan Semiconductor Manufacturing Company, Ltd. - Hsin-Chu
International Classification:

H01L 21/14
US Classification:

257431, 257E33002, 257E31079
Abstract:

Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.

Electronic Devices With Yielding Substrates
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US Patent:

8384121, Feb 26, 2013
Filed:

Jun 29, 2011
Appl. No.:

13/171973
Inventors:

Michael Tischler - Scottsdale AZ, US
Philippe Schick - Vancouver, CA
Ian Ashdown - West Vancouver, CA
Calvin Wade Sheen - Derry NH, US
Paul Jungwirth - Burnaby, CA
Assignee:

Cooledge Lighting Inc. - British Columbia
International Classification:

H01L 33/00
H01L 21/00
US Classification:

257 99, 438 22
Abstract:

In accordance with certain embodiments, a semiconductor die is adhered directly to a yielding substrate with a pressure-activated adhesive notwithstanding any nonplanarity of the surface of the semiconductor die or non-coplanarity of the semiconductor die contacts.

Electronic Devices With Yielding Substrates
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US Patent:

8466488, Jun 18, 2013
Filed:

May 8, 2012
Appl. No.:

13/466288
Inventors:

Michael Tischler - Scottsdale AZ, US
Philippe Schick - Vancover, CA
Ian Ashdown - West Vancover, CA
Calvin Wade Sheen - Derry NH, US
Paul Jungwirth - Burnaby, CA
Assignee:

Cooledge Lighting Inc. - Burnaby
International Classification:

H01L 29/72
US Classification:

257 99, 257 13
Abstract:

In accordance with certain embodiments, an unpackaged inorganic LED die is adhered directly to a yielding substrate with a pressure-activated adhesive notwithstanding any nonplanarity of the surface of the unpackaged inorganic LED die or non-coplanarity of the contacts thereof.

Epitaxial Formation Support Structures And Associated Methods
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US Patent:

8524518, Sep 3, 2013
Filed:

May 7, 2012
Appl. No.:

13/465867
Inventors:

Calvin Wade Sheen - Derry NH, US
Assignee:

Micron Technology, Inc. - Boise ID
International Classification:

H01L 21/00
US Classification:

438 46, 438458, 257E21497
Abstract:

Epitaxial formation support structures and associated methods of manufacturing epitaxial formation support structures and solid state lighting devices are disclosed herein. In several embodiments, a method of manufacturing an epitaxial formation support substrate can include forming an uncured support substrate that has a first side, a second side opposite the first side, and coefficient of thermal expansion substantially similar to N-type gallium nitride. The method can further include positioning the first side of the uncured support substrate on a first surface of a first reference plate and positioning a second surface of a second reference plate on the second side to form a stack. The first and second surfaces can include uniformly flat portions. The method can also include firing the stack to sinter the uncured support substrate. At least side of the support substrate can form a planar surface that is substantially uniformly flat.

Electronic Devices With Yielding Substrates
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US Patent:

8552463, Oct 8, 2013
Filed:

Jan 28, 2013
Appl. No.:

13/751563
Inventors:

Michael A. Tischler - Scottsdale AZ, US
Philippe M. Schick - Vancouver, CA
Ian Ashdown - West Vancouver, CA
Calvin Wade Sheen - Derry NH, US
Paul Jungwirth - Burnaby, CA
Assignee:

Cooledge Lighting Inc. - Burnaby
International Classification:

H01L 33/00
H01L 21/00
US Classification:

257 99, 438 22
Abstract:

In accordance with certain embodiments, a semiconductor die is adhered directly to a yielding substrate with a pressure-activated adhesive notwithstanding any nonplanarity of the surface of the semiconductor die or non-coplanarity of the semiconductor die contacts.

Quantum Tunneling Devices And Circuits With Lattice-Mismatched Semiconductor Structures
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US Patent:

8629047, Jan 14, 2014
Filed:

Jul 9, 2012
Appl. No.:

13/544661
Inventors:

Zhiyuan Cheng - Lincoln MA, US
Calvin Sheen - Derry NH, US
Assignee:

Taiwan Semiconductor Manufacturing Company, Ltd. - Hsin-Chu
International Classification:

H01L 21/8232
US Classification:

438594, 438407, 438471, 438511, 438947, 438979, 257 24, 257427, 257E21353, 257E21367, 257E21404
Abstract:

Structures include a tunneling device disposed over first and second lattice-mismatched semiconductor materials. Process embodiments include forming tunneling devices over lattice-mismatched materials.