Stanley G. Burns - Ames IA Carl Gruber - Le Sueur MN Howard R. Shanks - Ames IA Alan P. Constant - Ames IA Allen R. Landin - Boone IA David H. Schmidt - Ames IA
Assignee:
Iowa State University Research Foundation - Ames IA
International Classification:
H01L 218247
US Classification:
438258
Abstract:
An integrated thin film transistor on insulator circuit made up of a number of thin film transistors formed with small feature size and densely packed so as to allow interconnection as a complex circuit. An insulating substrate, preferably flexible, serves as the support layer for the integrated circuit. Control gate metallization is carried on the insulating substrate, a dielectric layer is deposited over the control gate, and an amorphous silicon layer with doped source and drain regions deposited on the dielectric layer. Trenches are formed to remove the amorphous silicon material between transistors to allow highly dense circuit packing. An upper interconnect level which forms connections to the source and drain and gate regions of the thin film transistors, also interconnects the transistors to form more complex circuit structures. Due to the dense packing of the transistors allowed by the trench isolation, the interconnecting foils can be relatively short, increasing the speed of the circuit.
Stanley G. Burns - Ames IA Carl Gruber - Le Sueur MN Howard R. Shanks - Ames IA Allan P. Constant - Ames IA Allen R. Landin - Boone IA David H. Schmidt - Ames IA
Assignee:
Iowa State University Research Foundation - Ames IA
International Classification:
H01L 29788
US Classification:
257315
Abstract:
A thin film floating gate transistor with improved dielectric structure. The dielectric structure serves the purpose of encapsulating the floating gate and also interfacing with the semiconductor material,. alpha. -Si:H. It thus must meet a variety of requirements. In order to provide long memory retention times, the dielectric material, at least in the regions encapsulating the floating gate, must have a high resistivity, on the order of 10. sup. 17 ohm-cm or better. Silicon dioxide is the preferred material for encapsulating the floating gate. However, since silicon dioxide creates a high density of defect state when interfaced with the. alpha. -Si:H layer. An interface layer, substantially free of oxide, is interposed between the high resistivity layer and the. alpha. -Si:H. Preferably, the interface portion of the dielectric layer is silicon nitride. In some cases, it is desirable to replace the entire dielectric structure, or at least the interface layer with aluminum nitride.
Amorphous Silicon On Insulator Vlsi Circuit Structures
Stanley G. Burns - Ames IA Carl Gruber - Le Sueur MN Howard R. Shanks - Ames IA Alan P. Constant - Ames IA Allen R. Landin - Boone IA David H. Schmidt - Ames IA
Assignee:
Iowa State University Research Foundation, Inc. - Ames IA
International Classification:
H01L 2904
US Classification:
257 59
Abstract:
An integrated thin film transistor on insulator circuit made up of a number of thin film transistors formed with small feature size and densely packed so as to allow interconnection as a complex circuit. An insulating substrate, preferably flexible, serves as the support layer for the integrated circuit. Control gate metallization is carried on the insulating substrate, a dielectric layer is deposited over the control gate, and an amorphous silicon layer with doped source and drain regions deposited on the dielectric layer. Trenches are formed to remove the amorphous silicon material between transistors to allow highly dense circuit packing. An upper interconnect level which forms connections to the source and drain and gate regions of the thin film transistors, also interconnects the transistors to form more complex circuit structures. Due to the dense packing of the transistors allowed by the trench isolation, the interconnecting foils can be relatively short, increasing the speed of the circuit.
Charter Communications - Fond du Lac, WI since Aug 2011
Principal Engineer
Charter Communications - Fond du Lac, WI Jun 2005 - Aug 2011
Network Engineer III
Charter Communications Jun 2004 - Jun 2005
Network Specialist
Education:
University of Wisconsin-Oshkosh 1998 - 2001
Cisco Certified Network Associate
CCNA
Comptia Network+
Skills:
DOCSIS Lan Switching Routing Protocols MPLS Networking VPLS Cisco Technologies Fortinet Vyatta Linux PHP Scripting CMTS Cisco 7600 7200 Series IOS-XR SNMP Network Monitoring Tools WiFi RF Engineering isis BGPv4 RIP IGRP EIGRP Spanning Tree Cable Broadband Cable Networks Cable Modems Change Management Project Management IPv6 IPv4 MySQL SQL Microwave Links TDMA DWDM HP Procurve Debian Netflow Cisco Routing & Switching Project Planning Network Design Network Engineering Network Architecture Capital Budgeting OSPF Metro Ethernet EVC
Honor & Awards:
Beacon Award 2003
Wisconsin Cable Communications Association Technical Innovator Award 2005, 2006
From Wikipedia, the free encyclopedia. Jump to: navigation, search. Heinz Karl Gruber (he professionally uses the form HK Gruber) is an Austrian composer, ...