Carl E Sutton

US Patent:

7933257, Apr 26, 2011

Filed:

Sep 20, 2006

Appl. No.:

11/524723

Inventors:

Carl David Sutton - Portola Valley CA, US

Assignee:

Cisco Technology, Inc. - San Jose CA

International Classification:

H04L 12/28

US Classification:

370351, 370401

Abstract:

A method of transmitting data from a source to a destination is described. A quality of service (QoS) tunnel is established between the source and the destination. Traffic from the source, and intended for the destination, will be sent via this tunnel. The traffic is manipulated by passing it through a performance enhancement proxy (PEP), in order to eliminate the “slow start” mechanism inherent to TCP traffic.

US Patent:

58676430, Feb 2, 1999

Filed:

Nov 6, 1995

Appl. No.:

8/554409

Inventors:

Carl D. Sutton - Palo Alto CA

Assignee:

Apple Computer, Inc. - Cupertino CA

International Classification:

G06F 1130

US Classification:

39518401

Abstract:

A run-time data type extension mechanism describes the kinds of performance information collected within a registry located in a main memory of a computer. The data type extension mechanism comprises a base node of a multi-linked tree data structure having associated therewith a buffer portion for storing the collected performance information and a description portion for describing that information. Writer entities specify the contents of these latter portions, i. e. , the collected information and its description, at run time to provide an arrangement for dynamically extending the kinds of information collected at the registry.

US Patent:

58871675, Mar 23, 1999

Filed:

Nov 3, 1995

Appl. No.:

8/553104

Inventors:

Carl D. Sutton - Palo Alto CA

Assignee:

Apple Computer, Inc. - Cupertino CA

International Classification:

G06F 946

US Classification:

395676

Abstract:

A synchronization arrangement provides writer and reader entities access to an information resource, such as a trace buffer, located in a registry of a computer. The arrangement comprises a counter upon which atomic increments are performed to allocate entries of the trace buffer for temporarily storing trace message fragments provided by the writer entities. The arrangement also comprises reassembly queues for temporarily storing the message fragments sequentially retrieved from the trace buffer by the reader entities.

US Patent:

59207191, Jul 6, 1999

Filed:

Nov 6, 1995

Appl. No.:

8/554402

Inventors:

Carl D. Sutton - Palo Alto CA
Marianne Hsien-Ming Hsiung - Woodside CA

Assignee:

Apple Computer, Inc. - Cupertino CA

International Classification:

G06F 945

US Classification:

395704

Abstract:

A hierarchical registration architecture manages and organizes the collection of performance information, such as statistics and tracing, for an extensible operating system of a computer. The registration architecture, or registry, comprises a multi-linked tree data structure within a main memory for accessing the performance information. Writer entities register their intent to collect and store performance information in the registry by creating objects, via novel API calls, as nodes organized within the tree structure. Each object node of the registry is named according to a convention that identifies the type of performance data collected by that node. Each object node further represents a single data item having a single data type for collecting the performance and a reference to the actual storage location of its collected performance information. Information storage preferably occurs in globally-shared memory so that any software entity can access the information.