Charles C Perkins

US Patent:

52394484, Aug 24, 1993

Filed:

Oct 28, 1991

Appl. No.:

7/783644

Inventors:

Charles T. Perkins - Austin TX
Gustav Schrottke - Austin TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H05K 114

US Classification:

361764

Abstract:

A method of reducing the area of MCMs that are integral to a flexible carrier is provided. A locally complex area, i. e. multilayer MCM carrier is constructed on a flex carrier, along with other components to form a subsystem. The flex carrier provides the interface between the MCM and the system that is utilizing the function. Also, the flex carrier will receive non-complex portions of the function, e. g. low I/O devices, not required to be mounted on the complex area (MCM) of the subsystem. The locally complex functional area will contain the high performance DCA mounted components, such as custom ASICs, processors, high frequency analog parts and other high I/O chips. The MCM on flex is constructed by obtaining an appropriate flexible carrier, such as a dielectric material having electrically conductive signal lines circuitized on both sides. A photoimageable dielectric layer is then placed over the appropriate portion of the circuitized carrier and vias are formed therein and filled with electrically conductive material. The top side of the dielectric layer is then circuitized and electrically connected to the flex carrier wiring layers as required.

US Patent:

60702117, May 30, 2000

Filed:

Jun 11, 1997

Appl. No.:

8/872823

Inventors:

Danny Marvin Neal - Round Rock TX
Charles Bertram Perkins - Cedar Park TX
Richard Allen Kelley - Apex NC
Paul Lee Clouser - Stamford CT

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1342

US Classification:

710106

Abstract:

A system of supporting differential signalling circuitry in an enhanced PCI bus within a data processing system is disclosed The enhanced PCI bus comprises a plurality of differential signal conductor pairs. A system and method in accordance with the present invention comprises a system for providing each of the plurality of differential signal pairs over a first line and a second line, the first line having a front end and a back end, the second line having a front end and a back end. The system and method includes a differential driver for driving the first line and the second line with a small voltage change of equal amounts in opposite direction to change logic states, a receiver for sensing a voltage change between the first line and the second line and a termination network coupled to the first line and second line for terminating the first line and the second line. According to the system and method disclosed herein, the present invention provides for higher frequency capability and lower noise to signal ratio, thereby allowing the enhenced PCI bus to be compatible with a legacy PCI bus.

US Patent:

61886750, Feb 13, 2001

Filed:

Aug 23, 1996

Appl. No.:

8/702778

Inventors:

Daniel Francis Casper - Poughkeepsie NY
Thomas Anthony Gregg - Highland NY
George Wayne Nation - Eyota MN
Kenneth Blair Ocheltree - Ossining NY
Charles Bertram Perkins - Cedar Park TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H04L 1228

US Classification:

370254

Abstract:

A system and method for progressively identifying and configuring the nodes of a network having an unknown or partially unknown topology are presented. A special all-node address indicator is designated for insertion in a packet to be sent from a given node with known node address to a next adjacent node with unknown node address. Each node contains a port control register for each port of the node which when set instructs the node to insert the all-node address indicator into a packet to be forwarded to a next adjacent node in the network with unknown node address. The port control registers are remotely selectively set by one or more managing nodes of the network. Race condition is avoided by provision of a set count register associated with an address node register and managing node address register within each node of the network. A node can be configured only if the previously read set count value remains unchanged between reading of and writing to the address node register or managing node address register. Provision for identifying additions, deletions and other changes to the network automatically is also provided.

US Patent:

58840532, Mar 16, 1999

Filed:

Jun 11, 1997

Appl. No.:

8/873347

Inventors:

Paul L. Clouser - Stamford CT
Richard Allen Kelley - Apex NC
Danny Marvin Neal - Round Rock TX
Charles Bertram Perkins - Cedar Park TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1300

US Classification:

395306

Abstract:

An enhanced PCI bus architecture utilizing differential signaling is supported by an adapter slot connector providing differential signaling pins and a make-before-break connection between bus conductors and dummy loads for each bus conductor, enabling higher frequency and higher bandwidth operation. The dummy loads simulate the signal load of an adapter inserted into the slot. The PCI bus conductors are automatically disconnected from the dummy loads and connected to the adapter pins when an adapter is inserted into the slot. A balanced load bus is thus provided regardless of whether adapter slots are populated or empty.

Address:

1301 Twin Cv, Kyle, TX 78640

VIN:

JM1BK12F971619243

Make:

MAZDA

Model:

MAZDA3

Year:

2007