Charles B Perry

US Patent:

20010050567, Dec 13, 2001

Filed:

Jun 22, 2001

Appl. No.:

09/887211

Inventors:

Thomas Bachelder - Swanton VT, US
Dennis Barringer - Walkill NY, US
Dennis Conti - Essex Junction VT, US
James Crafts - Warren VT, US
David Gardell - Fairfax VT, US
Paul Gaschke - Wappingers Falls NY, US
Mark Laforce - Essex Junction VT, US
Charles Perry - Poughkeepsie NY, US
Roger Schmidt - Poughkeepsie NY, US
Joseph Van Horn - Underhill VT, US
Wade White - Hyde Park NY, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R031/02

US Classification:

324/754000

Abstract:

An apparatus for simultaneously testing or burning in a large number of the integrated circuit chips on a product wafer includes probes mounted on a first board and tester chips mounted on a second board, there being electrical connectors connecting the two boards. The tester chips are for distributing power to the product chips or for testing the product chips. The probes and thin film wiring to which they are attached are personalized for the pad footprint of the particular wafer being probed. The base of the first board and the second board both remain the same for all wafers in a product family. The use of two boards provides that the tester chip is kept at a substantially lower temperature than the product chips during burn-in to extend the lifetime of tester chips. A gap can be used as thermal insulation between the boards, and the gap sealed and evacuated for further thermal insulation. Evacuation also provides atmospheric pressure augmentation of contact for connection between boards and contact to wafer. Probes for parallel testing of chips are arranged in crescent shaped stripes to significantly increase tester throughput as compared with probes arranged in an area array.

US Patent:

62750518, Aug 14, 2001

Filed:

Jan 29, 1999

Appl. No.:

9/240121

Inventors:

Thomas W. Bachelder - Swanton VT
Dennis R. Barringer - Walkill NY
Dennis R. Conti - Essex Junction VT
James M. Crafts - Warren VT
David L. Gardell - Fairfax VT
Paul M. Gaschke - Wappingers Falls NY
Mark R. Laforce - Essex Junction VT
Charles H. Perry - Poughkeepsie NY
Roger R. Schmidt - Poughkeepsie NY
Joseph J. Van Horn - Underhill VT
Wade H. White - Hyde Park NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G01R 1073
G01R 3128

US Classification:

324754

Abstract:

An apparatus for simultaneously testing or burning in a large number of the integrated circuit chips on a product wafer includes probes mounted on a first board and tester chips mounted on a second board, there being electrical connectors connecting the two boards. The tester chips are for distributing power to the product chips or for testing the product chips. The probes and thin film wiring to which they are attached are personalized for the pad footprint of the particular wafer being probed. The base of the first board and the second board both remain the same for all wafers in a product family. The use of two boards provides that the tester chip is kept at a substantially lower temperature than the product chips during burning to extend the lifetime of tester chips. A gap can be used as thermal insulation between the boards, and the gap sealed and evacuated for further thermal insulation. Evacuation also provides atmospheric pressure augmentation of contact for connection between boards and contact to wafer.