Chi Ping Chen

US Patent:

7180165, Feb 20, 2007

Filed:

Sep 5, 2003

Appl. No.:

10/656452

Inventors:

Mark Ellsberry - Santa Clara CA, US
Charles E. Schmitz - Granada Hills CA, US
Chi She Chen - Walnut CA, US
Victor Allison - Huntington TX, US

Assignee:

Sanmina, SCI Corporation - San Jose CA

International Classification:

H01L 23/02

US Classification:

257686, 257777, 257685, 257778, 438108, 438109, 361760

Abstract:

On implementation of the invention provides a stackable chip-scale package for improving memory density that may be mounted within a limited area or module. A novel staggered routing scheme enables the use of the same trace routing at every level of the stacked architecture for efficiently accessing individual memory devices in a chip-scale package stack. The use of a ball grid array chip-scale package architecture in combination with thermally compatible materials decreases the risk of thermal cracking while improving heat dissipation. Moreover, this architecture permits mounting support components, such as capacitors and resistors, on the chip-scale package.

US Patent:

7254036, Aug 7, 2007

Filed:

Apr 7, 2005

Appl. No.:

11/101155

Inventors:

Robert S. Pauley - Mission Viejo CA, US
Jayesh R. Bhakta - Cerritos CA, US
William M. Gervasi - Ladera Ranch CA, US
Chi She Chen - Walnut CA, US
Jose Delvalle - Costa Mesa CA, US

Assignee:

Netlist, Inc. - Irvine CA

International Classification:

H05K 7/20

US Classification:

361721, 361715, 361719, 257706, 257712, 165 802

Abstract:

A module is electrically connectable to a computer system. The module includes a frame having an edge connector with a plurality of electrical contacts which are electrically connectable to the computer system. The module further includes a first printed circuit board coupled to the frame. The first printed circuit board has a first surface and a first plurality of components mounted on the first surface. The first plurality of components is electrically coupled to the electrical contacts of the edge connector. The module further includes a second printed circuit board coupled to the frame. The second printed circuit board has a second surface and a second plurality of components mounted on the second surface. The second plurality of components is electrically coupled to the electrical contacts of the edge connector. The second surface of the second printed circuit board faces the first surface of the first printed circuit board.

US Patent:

7375970, May 20, 2008

Filed:

Jul 9, 2007

Appl. No.:

11/775125

Inventors:

Robert S. Pauley - Mission Viejo CA, US
Jayesh R. Bhakta - Cerritos CA, US
William M. Gervasi - Ladera Ranch CA, US
Chi She Chen - Walnut CA, US
Jose Delvalle - Costa Mesa CA, US

Assignee:

Netlist, Inc. - Irvine CA

International Classification:

H05K 7/20

US Classification:

361721, 361715, 361719, 257706, 257712, 165 802

Abstract:

A module is electrically connectable to a computer system. The module includes at least one multilayer structure having a plurality of electrical contacts which are electrically connectable to the computer system. The module further includes a first printed circuit board coupled to the at least one multilayer structure. The first printed circuit board has a first surface and a first plurality of components mounted on the first surface. The first plurality of components is in electrical communication with the electrical contacts. The module further includes a second printed circuit board coupled to the at least one multilayer structure. The second printed circuit board has a second surface and a second plurality of components mounted on the second surface. The second plurality of components is in electrical communication with the electrical contacts. The second surface of the second printed circuit board faces the first surface of the first printed circuit board.

US Patent:

7442050, Oct 28, 2008

Filed:

Aug 28, 2006

Appl. No.:

11/511523

Inventors:

Jayesh R. Bhakta - Cerritos CA, US
Enchao Yu - Irvine CA, US
Chi She Chen - Walnut CA, US
Richard E. Flaig - Mission Viejo CA, US

Assignee:

Netlist, Inc. - Irvine CA

International Classification:

H01R 12/00

US Classification:

439 71

Abstract:

A circuit card includes a rigid portion having a first plurality of contacts configured to be in electrical communication with a plurality of memory devices. The circuit card further includes a flexible connector coupled to the rigid portion. The flexible connector has a first side and a second side. The flexible connector comprises a dielectric layer, a second plurality of contacts configured to be in electrical communication with a substrate, and a plurality of electrical conduits on the first side of the flexible connector and extending from the rigid portion to the second plurality of contacts. The plurality of electrical conduits is in electrical communication with one or more contacts of the first plurality of contacts and with the second plurality of contacts. The flexible connector further includes an electrically conductive layer on the second side of the flexible connector. The electrically conductive layer is superposed with the plurality of electrical conduits with the dielectric layer therebetween.

US Patent:

7630202, Dec 8, 2009

Filed:

Mar 20, 2008

Appl. No.:

12/052678

Inventors:

Robert S. Pauley - Mission Viejo CA, US
Jayesh R. Bhakta - Cerritos CA, US
William M. Gervasi - Ladera Ranch CA, US
Chi She Chen - Walnut CA, US
Jose Delvalle - Costa Mesa CA, US

Assignee:

Netlist, Inc. - Irvine CA

International Classification:

H05K 7/20

US Classification:

361721, 361715, 361719, 257706, 257712, 165 802

Abstract:

A module is electrically connectable to a computer system. The module includes a plurality of electrical contacts which are electrically connectable to the computer system. The module further includes a first substrate which has a first surface and a first plurality of components mounted on the first surface. The first plurality of components is in electrical communication with the electrical contacts. The module further includes a second substrate which has a second surface and a second plurality of components mounted on the second surface. The second plurality of components is in electrical communication with the electrical contacts. The second surface of the second substrate faces the first surface of the first substrate. The module further includes at least one thermally conductive layer positioned between the first plurality of components and the second plurality of components. The at least one thermally conductive layer is in thermal communication with the first plurality of components, the second plurality of components, and a first set of the plurality of electrical contacts.

US Patent:

7811097, Oct 12, 2010

Filed:

Sep 24, 2008

Appl. No.:

12/237162

Inventors:

Jayesh R. Bhakta - Cerritos CA, US
Enchao Yu - Irvine CA, US
Chi She Chen - Walnut CA, US
Richard E. Flaig - Mission Viejo CA, US

Assignee:

Netlist, Inc. - Irvine CA

International Classification:

H01R 12/00

US Classification:

439 71

Abstract:

A circuit includes a first plurality of contacts configured to be in electrical communication with a plurality of electronic devices. The circuit card further includes a flexible portion including a dielectric layer, a second plurality of contacts, and a plurality of electrical conduits extending across a region of the flexible portion and in electrical communication with one or more contacts of the first plurality of contacts and with the second plurality of contacts. The flexible portion further includes an electrically conductive layer extending across the region of the flexible portion. The electrically conductive layer is superposed with the plurality of electrical conduits with the dielectric layer therebetween. The electrically conductive layer does not overlay one or more portions of the dielectric layer in the region of the flexible portion.

US Patent:

7839645, Nov 23, 2010

Filed:

Oct 26, 2009

Appl. No.:

12/606136

Inventors:

Robert S. Pauley - Mission Viejo CA, US
Jayesh R. Bhakta - Cerritos CA, US
William M. Gervasi - Ladera Ranch CA, US
Chi She Chen - Walnut CA, US
Jose Delvalle - Costa Mesa CA, US

Assignee:

Netlist, Inc. - Irvine CA

International Classification:

H05K 7/20

US Classification:

361721, 361704, 361719, 361720, 165 803

Abstract:

A module is electrically connectable to a computer system. The module includes a plurality of electrical contacts which are electrically connectable to the computer system. The module further includes a first surface and a first plurality of circuits coupled to the first surface. The first plurality of circuits is in electrical communication with the electrical contacts. The module further includes a second surface and a second plurality of circuits coupled to the second surface. The second plurality of circuits is in electrical communication with the electrical contacts. The second surface faces the first surface. The module further includes at least one thermally conductive layer positioned between the first surface and the second surface. The at least one thermally conductive layer is in thermal communication with the first plurality of circuits, the second plurality of circuits, and a first set of the plurality of electrical contacts.

US Patent:

RE42363, May 17, 2011

Filed:

Feb 15, 2010

Appl. No.:

12/557643

Inventors:

Mark Ellsberry - Santa Clara CA, US
Charles E. Schmitz - Granada Hills CA, US
Chi She Chen - Walnut CA, US
Victor Allison - Huntington TX, US
Jon Schmidt - San Juan Capistrano CA, US

Assignee:

Sanmina-SCI Corporation - San Jose CA

International Classification:

H01L 23/02

US Classification:

257686, 257777, 257685, 257778, 438108, 438109, 361760

Abstract:

On implementation of the invention provides a stackable chip-scale package for improving memory density that may be mounted within a limited area or module. A novel staggered routing scheme enables the use of the same trace routing at every level of the stacked architecture for efficiently accessing individual memory devices in a chip-scale package stack. The use of a ball grid array chip-scale package architecture in combination with thermally compatible materials decreases the risk of thermal cracking while improving heat dissipation. Moreover, this architecture permits mounting support components, such as capacitors and resistors, on the chip-scale package.