Chowdhary V Musunuri

age ~52

from San Ramon, CA

Also known as:
  • Musunuri V Chowdhary
  • Chowdhary V Apsani
  • Chowdhary V Musunur
Phone and address:
2312 Jasper Hill Dr, San Ramon, CA 94582
9258281716

Chowdhary Musunuri Phones & Addresses

  • 2312 Jasper Hill Dr, San Ramon, CA 94582 • 9258281716
  • Liberty Hill, TX
  • 2404 Latour Ct, Modesto, CA 95355
  • 3281 Falls Creek Ct, San Jose, CA 95135 • 4082708405
  • Santa Clara, CA
  • Tempe, AZ
  • Sunnyvale, CA
  • 2312 Jasper Hill Dr, San Ramon, CA 94582

Work

  • Company:
    Microsemi
    Sep 2012
  • Position:
    Director, solutions

Education

  • Degree:
    MS
  • School / High School:
    Arizona State University
    1994 to 1996
  • Specialities:
    Electrical Engineering

Skills

Telepresence • Embedded Systems • Wireless • Digital Signal Processors • FPGA • Video Conferencing • IP • H.323 • SoC • Hardware Architecture • RF • Verilog • Ethernet • Product Management • Cross-functional Team Leadership • VoIP • SIP • Unified Communications • Technical Marketing • H.264 • Computer Security • System Architecture • System Design • Video • Engineering Management • Embedded Software • Hardware • Cisco Technologies • Debugging • ASIC • Consumer Electronics

Industries

Computer Hardware

Resumes

Chowdhary Musunuri Photo 1

Director, Solutions At Microsemi

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Position:
Director, Solutions at Microsemi
Location:
Hyderabad, Andhra Pradesh, India
Industry:
Computer Hardware
Work:
Microsemi since Sep 2012
Director, Solutions

Cisco Systems Mar 2005 - Sep 2012
Senior Manager, Hardware Engineering

Teraburst Networks Aug 2000 - Mar 2005
Design Engineer

National Semiconductor Mar 1996 - Jul 2000
Design Engineer
Education:
Arizona State University 1994 - 1996
MS, Electrical Engineering
SV University 1990 - 1994
BS, Electrical Engineering
Skills:
Telepresence
Embedded Systems
Wireless
Digital Signal Processors
FPGA
Video Conferencing
IP
H.323
SoC
Hardware Architecture
RF
Verilog
Ethernet
Product Management
Cross-functional Team Leadership
VoIP
SIP
Unified Communications
Technical Marketing
H.264
Computer Security
System Architecture
System Design
Video
Engineering Management
Embedded Software
Hardware
Cisco Technologies
Debugging
ASIC
Consumer Electronics

Us Patents

  • Video Synchronization System

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  • US Patent:
    8102470, Jan 24, 2012
  • Filed:
    Feb 22, 2008
  • Appl. No.:
    12/035637
  • Inventors:
    Chowdhary Musunuri - San Jose CA, US
    Richard T. Wales - Sunnyvale CA, US
  • Assignee:
    Cisco Technology, Inc. - San Jose CA
  • International Classification:
    H04N 5/06
    H03L 7/00
  • US Classification:
    348521, 348540, 348547
  • Abstract:
    In one embodiment, a method for synchronizing a plurality of video signals received from one or more video sources is provided. The method includes providing one or more video sources and providing a codec including an internal reference oscillator. The method also includes generating a plurality of horizontal and vertical synchronization pulses based on the reference frequency of the internal reference oscillator, generating a composite synchronization pulse based on the plurality of horizontal and vertical synchronization pulses, and transmitting the composite synchronization pulse to the one or more video sources via a communication link. The method further includes separating the composite synchronization pulse back into the plurality of horizontal and vertical synchronization pulses, generating a pixel clock signal for the one or more video sources based on one or more of the plurality of horizontal and vertical synchronization pulses, and genlocking the one or more video sources based on the generated clock signal.
  • System And Method For Providing Immersive Visualization At Low Bandwidth Rates

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  • US Patent:
    20050060421, Mar 17, 2005
  • Filed:
    Jul 15, 2004
  • Appl. No.:
    10/891078
  • Inventors:
    Chowdhary Musunuri - San Jose CA, US
    Raghavan Anand - San Francisco CA, US
    Johan Pirot - Fremont CA, US
    Rahul Kale - Milpitas CA, US
  • International Classification:
    G06F015/16
  • US Classification:
    709231000
  • Abstract:
    A system and method are disclosed for providing immersive visualization at low bandwidth rates. The system retrieves a frame of multimedia information for transmission over a network and converts the frame from a first color space to a second color space. The system slices the frame into a plurality of frame slices and transforms each of the plurality of frame slices into a plurality of corresponding frequency domain components. The system quantizes the frequency domain components of each frame slice, when the frame slice to be processed is an intra-slice or a refresh slice, to generate quantized frequency domain components of each frame slice. The system variable-length encodes the quantized frequency domain components of each frame slice to generate compressed multimedia information associated with each frame slice. The system constructs network packets of the compressed multimedia information associated with each frame slice, and transmits the network packets via the network.
  • Video Testing Using A Test Pattern And Checksum Calculation

    view source
  • US Patent:
    20080129826, Jun 5, 2008
  • Filed:
    Dec 1, 2006
  • Appl. No.:
    11/565784
  • Inventors:
    Chowdhary Musunuri - San Jose CA, US
    Richard T. Wales - Sunnyvale CA, US
  • International Classification:
    H04N 17/00
    H04N 11/02
  • US Classification:
    348192, 37524001, 348E17001, 375E07076
  • Abstract:
    A method, an apparatus, and logic for testing a video data path. One method includes sending video data corresponding to a video test pattern to an input port of a video data path; receiving video data at an output port of the video data path; and calculating a function of at least the active part of the received video data. The function is selected such that it has a correct value when the at least the active part of the received video data accurately corresponds to the corresponding part of the sent video data. The method further includes ascertaining whether the function of at least the active part of the received video data has the correct value to ascertain whether or not an error has occurred.
  • Video Decoder With An Adjustable Video Clock

    view source
  • US Patent:
    20090109988, Apr 30, 2009
  • Filed:
    Oct 26, 2007
  • Appl. No.:
    11/925013
  • Inventors:
    Chowdhary Musunuri - San Jose CA, US
    David J. Mackie - San Jose CA, US
    Richard T. Wales - Sunnyvale CA, US
    J. William Mauchly - Berwyn PA, US
  • International Classification:
    H04L 12/56
  • US Classification:
    370412
  • Abstract:
    A method, an apparatus, and logic encoded in a computer-readable medium to carry out a method. The method includes receiving packets containing compressed video information, storing the received packets in a buffer memory, timestamping the received packets according to an adjustable clock; and removing packets from the buffer for decoding and playout of the video information, the removing according to playback order and at a time determined by the adjustable clock. The method includes adjusting the adjustable clock from time to time according to a measure the amount of time that the packets reside in the buffer memory, such that time latency caused by the buffer memory is limited. An overrun or an underrun of the buffer memory is unlikely.

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Chowdhary Musunuri

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Friends:
Philip Graham, Rich Wales

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