Frank Preiss - Santa Cruz CA Christian Staudt - Santa Clara CA Joerg Hartung - Los Gatos CA
Assignee:
Infineon Technologies North America Corpration - San Jose CA
International Classification:
G06F 1342
US Classification:
710105, 710106, 710305, 710306
Abstract:
An improved Universal Serial Bus interface employing FIFO buffers ( ) for interfacing to an application bus and a microprocessor bus, in particular, an XBUS. The interface includes a plurality of transmit/receive channels ( ) multiplexed to the application bus and the XBUS. Each transmit channel includes a transmit FIFO buffer ( ), a transmit write buffer ( ), a transmit push buffer ( ), and three transmit state machines: a transmit write state machine ( ), a transmit interrupt state machine ( ), and a transmit push state machine ( ). The transmit state machine ( ) and the transmit FIFO ( ) are clocked in the USB domain. The transmit write register ( ) is clocked in the XBUS domain. Each receive channel includes a receive FIFO buffer ( ), a receive state machine ( ), and a receive register ( ). The receive FIFO ( ), the receive state machine ( ), and the receive register ( ) are all clocked in the USB domain.
Universal Serial Bus Transceiver Shortcut Protection
Christian Staudt - Santa Clara CA Joerg Hartung - Los Gatos CA
Assignee:
Infineon Technologies North America Corp. - San Jose CA
International Classification:
G06F 1100
US Classification:
714 25
Abstract:
A Universal Serial Bus interface including a USB device controller coupled by way of a shortcut protection circuit to a USB transceiver. The shortcut protection circuit compares the driven DPLS and DMNS signals from the USB transceiver with TxDPLS and TxDMNS, the transmitted signals from the USB device controller. If a difference is detected between TxDPLS and DPLS, or between TxDMNS and DMNS, the transmission is disabled.