Christoph Alfred Wasshuber from 14 Durham St, Somerville, MA 02143, age 57, Phone: 2102544335

Spot-Implant Method For Mos Transistor Applications
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US Patent:

6458666, Oct 1, 2002
Filed:

Jun 4, 2001
Appl. No.:

09/873545
Inventors:

Christoph Wasshuber - Parker TX
Assignee:

Texas Instruments Incorporated - Dallas TX
International Classification:

H01L 21336
US Classification:

438302, 438525, 438531
Abstract:

A spot-implant method for MOS transistors. An asymmetric masking film ( ) is formed on a semiconductor substrate and on a transistor gate ( ) with an opening ( ) adjacent to the transistor gate ( ). A spot region ( ) is formed adjacent to the transistor gate ( ) by ion implantation ( ).

Single-Electron Memory
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US Patent:

6487112, Nov 26, 2002
Filed:

Nov 19, 1999
Appl. No.:

09/444243
Inventors:

Christoph Wasshuber - Parker TX 75002
International Classification:

G11C 1100
US Classification:

365163, 365161, 365186
Abstract:

A memory device in which each cell includes two portions of isolated-granular material: one portion forms the channel of a single-electron transistor, and the other provides a hysteretic I-V relationship in the gate circuit of the transistor.

Method For Forming A Bottom Corner Rounded Sti
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US Patent:

6524930, Feb 25, 2003
Filed:

Apr 25, 2002
Appl. No.:

10/131958
Inventors:

Christoph A. Wasshuber - Parker TX
Zhihao Chen - Plano TX
Freidoon Mehrad - Plano TX
Assignee:

Texas Instruments Incorporated - Dallas TX
International Classification:

H01L 2176
US Classification:

438424
Abstract:

Methods are disclosed for the formation of isolation structures and trenches in semiconductor devices, in which lower corners of an isolation trench are rounded after trench formation using an oxidation process which oxidizes substrate material from the trench sidewalls and bottom faster than from the lower corners of the trench. The oxide formed during the rounding process is then removed prior to performing other etch processes, to expose substrate material having rounded lower corners. Thereafter, a liner is formed and the trench is filled with dielectric material to complete the isolation structure.

Undulated Moat For Reducing Contact Resistance
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US Patent:

6780742, Aug 24, 2004
Filed:

Jul 3, 2003
Appl. No.:

10/613195
Inventors:

Christoph Wasshuber - Parker TX
Assignee:

Texas Instruments Incorporated - Dallas TX
International Classification:

H01L 213205
US Classification:

438592, 438197, 438303, 438585, 438595, 438652, 438655
Abstract:

The present invention includes a method of forming a semiconductor device.

Methods And Apparatus For Inducing Stress In A Semiconductor Device
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US Patent:

6806151, Oct 19, 2004
Filed:

Dec 14, 2001
Appl. No.:

10/020111
Inventors:

Christoph Wasshuber - Parker TX
Keith A. Joyner - Richardson TX
Assignee:

Texas Instruments Incorporated - Dallas TX
International Classification:

H01L 2100
US Classification:

438301, 438528
Abstract:

Methods and apparatus are disclosed for selectively inducing stress in a semiconductor device, wherein a first region of a substrate is implanted so as to induce stress in a second region. An electrical device is formed at least partially in the second region, wherein the induced stress therein may improve one or more operational characteristics of the device, such as channel region carrier mobility.

Suspended Gate Single-Electron Device
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US Patent:

6844566, Jan 18, 2005
Filed:

May 30, 2003
Appl. No.:

10/448673
Inventors:

Christoph Wasshuber - Parker TX, US
Assignee:

Texas Instruments Incorporated - Dallas TX
International Classification:

H01L 2906
US Classification:

257 20, 257 9, 257 14, 257 24, 257 30, 257 36, 438197, 438299, 438585
Abstract:

The present invention provides a single-electron transistor device (). The device () comprises a source () and drain () located over a substrate () and a quantum island () situated between the source and drain (), to form tunnel junctions () between the source and drain (). The device () further includes a movable electrode () located adjacent the quantum island () and a displaceable dielectric () located between the moveable electrode () and the quantum island (). The present invention also includes a method of fabricating a single-electron device (), and a transistor circuit () that include a single-electron device ().

Suspended Gate Single-Electron Device
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US Patent:

7018881, Mar 28, 2006
Filed:

Nov 3, 2004
Appl. No.:

10/982730
Inventors:

Christoph Wasshuber - Parker TX, US
Assignee:

Texas Instruments Incorporated - Dallas TX
International Classification:

H01L 29/8238
H01L 29/336
H01L 29/3205
US Classification:

438197, 438299, 438585, 438593
Abstract:

The present invention provides a single-electron transistor device (). The device () comprises a source () and drain () located over a substrate () and a quantum island () situated between the source and drain (), to form tunnel junctions () between the source and drain (). The device () further includes a movable electrode () located adjacent the quantum island () and a displaceable dielectric () located between the moveable electrode () and the quantum island (). The present invention also includes a method of fabricating a single-electron device (), and a transistor circuit () that include a single-electron device ().

Method To Improve Drive Current By Increasing The Effective Area Of An Electrode
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US Patent:

7109556, Sep 19, 2006
Filed:

Nov 16, 2004
Appl. No.:

10/989480
Inventors:

Majid M. Mansoori - Plano TX, US
Christoph Wasshuber - Cambridge MA, US
Assignee:

Texas Instruments Incorporated - Dallas TX
International Classification:

H01L 29/76
H01L 29/94
US Classification:

257384, 257754
Abstract:

The present invention provides source/drain electrode for a transistor. The source/drain electrode comprises a plurality of polysilicon grains located over a source/drain region. A metal salicide layer conformally coats the plurality of polysilicon grains. The present invention also includes a method of fabricating the above described source/drain electrode , and integrated circuit have includes a semiconductor device having the described source/drain electrodes.