Christopher N Dillon

Address:

3866 N Milwaukee Ct, Chicago, IL 60641

VIN:

5FNYF18587B015431

Make:

HONDA

Model:

PILOT

Year:

2007

US Patent:

6556060, Apr 29, 2003

Filed:

Jun 6, 2002

Appl. No.:

10/166220

Inventors:

Christopher Daniel Dillon - Greensboro NC
Lawrence A. Singer - Bedford MA

Assignee:

Analog Devices, Inc. - Norwood MA

International Classification:

H03K 3356

US Classification:

327210, 327215

Abstract:

Latch structures and systems are disclosed that enhance latch speed and reduce latch current drain while providing complementary metal-oxide-semiconductor (CMOS)-level latch signals. They are realized with bipolar junction structures and CMOS structures that are arranged to limit latch currents in response to CMOS-level sense signals S.

US Patent:

6590422, Jul 8, 2003

Filed:

Mar 27, 2002

Appl. No.:

10/112846

Inventors:

Christopher Daniel Dillon - Greensboro NC

Assignee:

Analog Devices, Inc. - Norwood MA

International Classification:

H03K 190175

US Classification:

326 86, 326 30, 326 83, 326 82, 327108, 327 87, 327 67, 330253, 330258, 341156, 341159

Abstract:

LVDS drivers and analog-to-digital (ADC) systems are provided which facilitate easy alteration (e. g. , replacement of a selectable resistor R ) of differential current levels and differential voltages in response to altered loads. These drivers and systems maintain common-mode levels in the loads which are unaffected by alterations in the loads and their associated differential current and voltage levels.

US Patent:

6650263, Nov 18, 2003

Filed:

Nov 4, 2002

Appl. No.:

10/288318

Inventors:

Christopher Daniel Dillon - Greensboro NC

Assignee:

Analog Devices, Inc. - Norwood MA

International Classification:

H03M 100

US Classification:

341122, 341162, 327 96

Abstract:

Differential sampler structures are provided that reduce signal distortion and current demand. The structures include first and second buffers that drive first and second capacitors and first and second switches. First and second current pumps are capacitively coupled and also cross coupled to the first and second capacitors relative to the coupling of the first and second buffers to these capacitors. As a result, signal distortion and current demand are both reduced.

US Patent:

6700403, Mar 2, 2004

Filed:

May 15, 2002

Appl. No.:

10/146992

Inventors:

Christopher Daniel Dillon - Greensboro NC

Assignee:

Analog Devices, Inc. - Norwood MA

International Classification:

H03K 190175

US Classification:

326 37, 326 30, 326 58, 326 83, 326 90, 327108, 341156, 341159

Abstract:

Data driver systems are provided that have programmable modes of operation to thereby facilitate selection of output signal forms and reduction of output ports in signal conditioning systems (e. g. , analog-to-digital converters). The systems effectively reduce pin count by sharing pins between different drivers and selectively configuring the drivers in driver and high output-impedance states.

US Patent:

6882292, Apr 19, 2005

Filed:

Jan 7, 2004

Appl. No.:

10/753921

Inventors:

Scott Gregory Bardsley - Summerfield NC, US
Christopher Dillon - Greensboro NC, US

Assignee:

Analog Devices, Inc. - Norwood MA

International Classification:

H03M001/10

US Classification:

341121, 341155, 341144

Abstract:

A pipelined analog to digital converter. Each stage in the pipeline has a flash converter and a multiplying digital to analog converter. Each stage provides a digital bits and an analog residue that is passed to the next stage in the pipeline. The digital bits from all stages are combined in digital logic to produce the digital output of the converter. The flash converter in each stage has a set of comparators, each coupled to a reference ladder. A random number generator in connection with a switch matrix “shuffles” the reference inputs to the comparators. The comparators are latched as soon as practical after they are stable and the reference inputs are shuffled as soon as practical after the comparators are latched. Also, a bandwidth trim circuit is provided to compensate for different cutoff frequencies of the input impedances of the flash and multiplying digital to analog converters.

US Patent:

7221191, May 22, 2007

Filed:

Jul 21, 2005

Appl. No.:

11/187061

Inventors:

Ahmed Mohamed Abdelatty Ali - Oak Ridge NC, US
Christopher Daniel Dillon - Greensboro NC, US

Assignee:

Analog Devices, Inc. - Norwood MA

International Classification:

G11C 27/02

US Classification:

327 94, 341122

Abstract:

Signal sampler embodiments are provided for processing input signals along signal paths in response to mode-command signals. They include a follower transistor with a control terminal and a current terminal that establish at least part of a signal path. They also include a switched-capacitor network that receives signals from the current terminal in response to a first mode-command signal and that couple a selected one of a set of reference signals to the current terminal in response to a second mode-command signal. During a second mode-command signal, a bias switch is arranged to bias off the follower transistor by coupling a bias signal to the control terminal that approximates the selected reference signal. Accordingly, the amplitude of the reference signals can be increased to facilitate an increased dynamic range of the input signals without biasing the follower transistor into breakdown.

US Patent:

7295070, Nov 13, 2007

Filed:

Jun 21, 2005

Appl. No.:

11/157527

Inventors:

Christopher Dillon - Greensboro NC, US

Assignee:

Analog Devices, Inc. - Norwood MA

International Classification:

H03F 3/45

US Classification:

330258, 330292, 330310

Abstract:

A flip around amplifier circuit is provided that includes an amplifier having first and second amplification stages, a Miller capacitor, and a resistive element in series with the Miller capacitor, where an output line of the second amplification stage can be coupled to an output line of the first amplification stage through the Miller capacitor and the series resistive element. The circuit can include a feedback capacitor having a first plate coupled to an input line of the amplifier, and a flip around switch that can be operated so as to connect an output line of the amplifier to a second plate of the feedback capacitor. The circuit's classical transfer function can include a zero associated with the Miller capacitor and the series resistive element, and a pole associated with the feedback capacitor and the on-resistance of the flip around switch, where the zero is substantially equal to the pole.

US Patent:

20200274542, Aug 27, 2020

Filed:

Feb 22, 2019

Appl. No.:

16/283194

Inventors:

- Norwood MA, US
Ahmed Mohamed Abdelatty ALI - Oak Ridge NC, US
Christopher Daniel DILLON - Greensboro NC, US

Assignee:

Analog Devices, Inc. - Norwood MA

International Classification:

H03M 1/00
H03M 1/08

Abstract:

Comparators are implemented in many circuits, including analog-to-digital converters (ADCs). Some ADCs demand high bandwidth, low power consumption, and high speed. To address these requirements, a comparator circuit can be implemented without a separate pre-amplifier, where a sampling network drives a latch directly. Specifically, the comparator circuit integrates a pre-amplifier within the latch in a manner that ensures low power and high speed operation.