Christopher M Green

US Patent:

7634694, Dec 15, 2009

Filed:

Oct 15, 2004

Appl. No.:

10/966254

Inventors:

Christopher M. Green - Austin TX, US
David J. Knapp - Austin TX, US
Horace C. Ho - Austin TX, US

Assignee:

Standard Microsystems Corporation - Hauppauge NY

International Classification:

G06F 11/00

US Classification:

714701, 375295, 375319, 714751, 714775, 327307, 380210, 341 58

Abstract:

A communication system for transmitting and receiving a sequence of bits, and the methodology for transferring that sequence of bits are provided. The communication system includes a transmitting circuit and a receiving circuit. Within the transmitting circuit is a scrambler that comprises a shift register, an enable circuit, and an output circuit. The shift register temporarily stores n bits within the sequence of bits, and the enable circuit enables the shift register to store bits that arise only within the payload section of a frame. The output circuit includes a feedback, and several taps within the n stages to scramble logic values within the sequence of n bits output from the shift registers thus effectively preventing in most instances the sequence of bits from exceeding n number of the same logic value. Within the receiving circuit is a descrambler also having a shift register, an enable circuit, and an output circuit. The descrambler recompiles the scrambled data back to its original form.

US Patent:

8575973, Nov 5, 2013

Filed:

May 25, 2012

Appl. No.:

13/481038

Inventors:

Xianyao Wang - Austin TX, US
Peter E. Sheldon - Cedar Park TX, US
Christopher M. Green - Austin TX, US

Assignee:

SMSC Holdings S.A.R.L. - Luxembourg

International Classification:

H03B 21/00

US Classification:

327105

Abstract:

A frequency synthesizer system may generate two intermediate clock signals, each intermediate clock signal having the same nominal frequency (f), the same cycle pattern with deterministic jitter, and the same corresponding average frequency (f). However, the cycle pattern in one intermediate clock signal may be a specified number (N) of cycles out of phase with respect to the cycle pattern in the other intermediate clock signal. The cycle pattern may recur every 2N cycles in each intermediate clock signal. The duration of each cycle in each of the two intermediate clock signals is defined by fand the deterministic jitter in the cycle pattern. An output clock signal may be generated by phase interpolating by two (2) the two intermediate clock signals, and dividing the resulting phase interpolated clock signal by N. The resulting output clock signal has an accurate frequency commensurate with f/N, and is free of deterministic jitter.

US Patent:

20090092210, Apr 9, 2009

Filed:

Oct 3, 2008

Appl. No.:

12/245005

Inventors:

Christopher Green - Austin TX, US
Claudius Becker - Ubstadt-Weiher, DE

Assignee:

SMSC Europe GmbH - Karlsruhe

International Classification:

H04L 7/00

US Classification:

375354

Abstract:

A communication system, network, interface, and port architecture are provided for transferring data via a network. The network can be configured by connecting ports in a daisy chain arrangement to achieve a ring architecture or topology. The network transmits data according to a specific protocol. A first port transmits frames containing frame count information which is divided into several pieces, with each piece being transmitted in a single frame. A second port receives the frames, stores them in a frame buffer, and reassembles the frame count information from a plurality of frames.

US Patent:

20110044350, Feb 24, 2011

Filed:

Aug 20, 2010

Appl. No.:

12/860197

Inventors:

Christopher Green - Austin TX, US
Claudius Becker - Ubstadt-Weiher, DE
Eric Matthew Ching - Austin TX, US

International Classification:

H04L 12/56

US Classification:

370403

Abstract:

A communication system, network, interface, and port architecture are provided for transporting data across a ring network. A network node operating as a first timing master generates a set of frames, each frame having a preamble, a data field and a time count field, which represents a portion of the time information associated with the set of frames. This time information may include counted time units, like seconds, or a number of generated and transmitted over the network. As the individual frames of a set of frames are generated and sent on the network, they pass other network nodes and are forwarded through the ring bus to the first timing master which receives at least a portion of the set it is still generating. This enables a received time count field to be compared with a transmitted time count field of the same set. If the fields are identical, there is no other timing master on the bus. If there is another timing master on the bus, the additional timing master would overwrite the contents of the time count field propagating through the network; therefore, the received time count field would not be equal to the time count field being transmitted by the first timing master.

US Patent:

20110185087, Jul 28, 2011

Filed:

Jan 22, 2010

Appl. No.:

12/691815

Inventors:

Haider Ali Khan - Austin TX, US
Matthew John Koenn - Austin TX, US
John Robert Breyer - Austin TX, US
Christopher Frederick Graf - Liberty Hill TX, US
Siddharth Sethi - Austin TX, US
Christopher Scott Green - Austin TX, US

International Classification:

G06F 13/00
G06F 3/00

US Classification:

710 14, 710 33, 710 32

Abstract:

Transferring data between devices utilizing state data. The devices may include a writer device and a reader device, each coupled to a common bus. A host device may create a transfer session between the devices. Each of the host device, the writer device, and the reader device may maintain state data of the transfer session. The host device may notify at least one of the reader device or the writer device of a state change from a disabled state to an enabled state. After enabling, data may be transferred directly between the writer device and the reader device without involving the host device. Finally, the host device may notify at least one of the reader device or the writer device of a state change from the enabled state to the disabled state. After disabling, the direct transfer of data between the writer device and the reader device may be stopped.

US Patent:

20220369438, Nov 17, 2022

Filed:

Jul 27, 2022

Appl. No.:

17/875050

Inventors:

- Coopersburg PA, US
Brad M. Kreschollek - Bethlehem PA, US
Bryan R. Barnes - Lansdale PA, US
Christopher M. Green - Austin TX, US
Rhodes B. Baker - Allentown PA, US
Jennifer Wong - Breinigsville PA, US
Gregory S. Altonen - Easton PA, US
Karelys Alfonzo - Philadelphia PA, US

Assignee:

Lutron Technology Company LLC - Coopersburg PA

International Classification:

H05B 45/20
G05B 15/02

Abstract:

Systems and methods are disclosed for communicating via a communications network with a load control system of a respective user environment, receiving information on the load control system via the communications network, displaying graphical user interfaces based on the received information, and controlling and configuring the load control system via graphical user interfaces by communicating via the communications network messages the load control system.

US Patent:

20220279633, Sep 1, 2022

Filed:

May 16, 2022

Appl. No.:

17/745313

Inventors:

- Coopersburg PA, US
Bryan R. Barnes - Lansdale PA, US
Christopher M. Green - Austin TX, US

Assignee:

Lutron Technology Company LLC - Coopersburg PA

International Classification:

H05B 45/20
H05B 45/10
G06F 3/0481
G06F 3/04842
G06F 3/04847

Abstract:

In an auto vibrancy mode, a vibrancy value for a lighting load may be automatically determined based on a selected color setting for the lighting load. The automatically determined vibrancy value may also be configured to emit light from the lighting load at or above a target CRI value for the selected color setting. The selected color setting may be a CCT value on the black-body curve or an x-y chromaticity value. If the selected color setting is CCT value on the black-body curve, the automatically determined vibrancy value may be a pre-defined vibrancy value that is configured to emit light from the lighting load at or above the target CRI value for the selected CCT value. If the selected color setting is an x-y chromaticity value, the automatically determined vibrancy value may be based on the distance between the selected x-y chromaticity value and the black-body curve.

US Patent:

20230097102, Mar 30, 2023

Filed:

Dec 6, 2022

Appl. No.:

18/075618

Inventors:

- Coopersburg PA, US
Ari L. Fox - Somerville MA, US
Christopher M. Green - Austin TX, US
Stephen Phillips - Melrose MA, US
Jonathan R. Redus - Malden MA, US
Jaykrishna A. Shukla - Mays Landing NJ, US

Assignee:

Lutron Technology Company LLC - Coopersburg PA

International Classification:

H05B 47/18
F21S 4/28
F21V 5/00
F21V 7/00
F21V 7/04
F21V 23/06

Abstract:

A linear lighting device may include an elongated housing that defines a cavity. The linear lighting device may include plurality of emitter printed circuit boards configured to be received within the cavity. Each of the plurality of emitter printed circuit boards may include a plurality of emitter modules mounted thereto. Each of the plurality of emitter printed circuit boards may include a control circuit configured to control the plurality of emitter modules mounted to the respective emitter printed circuit board based on receipt of one or more messages. The linear lighting device may include a total internal reflection lens for each of the plurality of emitter printed circuit boards. The total internal reflection lens may be configured to diffuse light emitted by the emitter modules of the plurality of emitter printed circuit boards.