Christopher J Payson

US Patent:

7193994, Mar 20, 2007

Filed:

Aug 16, 2002

Appl. No.:

10/222538

Inventors:

Christopher J. Payson - Bolton MA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H04J 3/06

US Classification:

370380, 370503

Abstract:

A technique synchronizes a crossbar switch fabric of a network switch having a plurality of modules configured to transmit and receive data at high speeds. The crossbar switch fabric resides on a switch module and operates on fixed-size cells received at its input ports from line card modules over high-speed serial communication paths of the switch. To eliminate resynchronization between the modules after each serial communications path traversal, each module is allowed to operate within its own clock domain, thereby forcing the entire resynchronization task upon a receive data path of the switch module. Although this results in resynchronization of a “large magnitude”, the task only needs to be performed once and entirely on the switch module.

US Patent:

7194661, Mar 20, 2007

Filed:

Dec 23, 2002

Appl. No.:

10/328521

Inventors:

Christopher J. Payson - Bolton MA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

G06F 11/00

US Classification:

714 43, 370242, 714 49

Abstract:

An online system monitoring technique quickly and efficiently identifies failures or other system errors arising during operation of an intermediate network node, such as a network switch. The technique comprises Keep Alive Buffer packets/cells (“KABs”) that exercise data and control paths extending from every ingress port to every egress port in the switch. By exercising the data and control paths, the KABs enable testing of, and ensuring against, component failures, missing modules or other types of failure that can be detected as soon as possible, to thereby prevent data flow backup or other performance degradation in the switch.

US Patent:

7480335, Jan 20, 2009

Filed:

Jul 16, 2004

Appl. No.:

10/892899

Inventors:

Christopher Payson - Bolton MA, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H04N 7/18

US Classification:

37524025, 37524012, 37524015

Abstract:

Described herein is a video decoder for decoding macroblock adaptive field/frame coded video data with spatial prediction. In one embodiment, there is presented a spatial predictor for processing a macroblock pair. The spatial predictor comprises a first buffer, a second buffer, a third buffer, and arithmetic logic. The first buffer stores pixels from a first portion of the picture, the first portion neighboring the portion. The second buffer stores pixels from a second portion of the picture, the second portion neighboring the portion. The third buffer stores one or more pixels from a third portion of the picture, the third portion neighboring the portion. The arithmetic logic processes the portion from at least one of the pixels from the first buffer, at least one of the pixels from the second buffer, and at least one of the pixels from the third buffer.

US Patent:

7515637, Apr 7, 2009

Filed:

Oct 27, 2004

Appl. No.:

10/974179

Inventors:

Christopher Payson - Bolton MA, US

Assignee:

Broadcom Advanced Compression Group, LLC - Andover MA

International Classification:

H04N 7/12

US Classification:

37524016, 375240, 37524001, 37524012

Abstract:

Methods and systems for processing pixels within an encoded video stream are disclosed herein. Aspects of the method may comprise acquiring on a chip, a prediction weight type from the encoded video stream. Prediction weight data for at least one prediction pixel within the encoded video stream may be acquired based on the prediction weight type. A look-up table entry in a look-up table may be generated for the prediction pixel utilizing the prediction weight data. A plurality of current pixels within the encoded video stream may be estimated utilizing the look-up table entry. The prediction weight type may correspond to a plurality of reference pictures within the encoded video stream. A prediction weight value, offset value and motion vector data for the prediction pixel may be acquired on the chip, if the prediction weight type comprises an explicit prediction weight type.

US Patent:

7570270, Aug 4, 2009

Filed:

Oct 27, 2004

Appl. No.:

10/974872

Inventors:

Christopher Payson - Bolton MA, US
Landis Rogers - Kingston NH, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

G09G 5/36
G06T 7/20
G06T 1/60
G06F 13/00
H04N 7/12
H04N 9/44
H04B 13/00
H04N 9/64
G06T 15/00

US Classification:

345558, 345530, 345536, 345547, 3483871, 3484254, 348500, 348715, 375240, 37524026, 37524028, 711100, 711170

Abstract:

Methods and systems for processing pixels within a decoded video stream are disclosed. Processed pixels may be received within the decoded video stream and may be buffered in a buffer at a first rate. The buffered received processed pixels may be transferred out of the buffer at a second rate, where the first rate is greater than said second rate. The buffering of the received processed pixels and the transferring of the buffered received processed pixels out of the buffer may be monitored to prevent an overrun of the buffer. The first rate of the buffering of the received processed pixels may be reduced to prevent the overrun of the buffer. The second rate of the transferring of the buffered received processed pixels out of the buffer may be monitored to prevent the overrun of the buffer. Amount of the buffered received processed pixels within the buffer may be determined.

US Patent:

8294822, Oct 23, 2012

Filed:

Aug 17, 2010

Appl. No.:

12/858068

Inventors:

Christopher Payson - Bolton MA, US
Timothy Hellman - Concord MA, US
Ashish Koul - Cambridge MA, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H04N 5/14
H04N 9/74

US Classification:

348571, 348590

Abstract:

A video processing device may process video input comprising a plurality of streams, wherein images corresponding to at least some of the plurality of streams may be displayed concurrently. The video processing device may determine, prior to processing of a pixel in one of the plurality of streams whether the pixel comprises one or more keyed video parameters; and if the pixel comprises at least one keyed parameter, one or more other pixels may be selected, and a video parameter corresponding to the at least one keyed video parameter of the pixel may be generated based on the selected one or more other pixels. The generated video parameter may then be utilized instead of the at least one keyed video parameter during the processing of the pixel. This may comprise luma and/or chroma based scaling. Outputs of the processing of the pixel may be post-processed, by clamping at least one of the video parameters.

US Patent:

20110134211, Jun 9, 2011

Filed:

Dec 8, 2010

Appl. No.:

12/963212

Inventors:

Darren Neuman - Palo Alto CA, US
Jason Herrick - Pleasanton CA, US
Christopher Payson - Bolton MA, US
Qinghua Zhao - Cupertino CA, US

International Classification:

H04N 13/00

US Classification:

348 42, 348E13001

Abstract:

Aspects of a method and system for handling multiple 3-D video formats are provided. A video processing system may receive one or more video frames comprising first 3-D view pixel data and second 3-D view pixel data suitable for generating a three-dimensional (3-D) video frame. The video system may be operable to determine an arrangement of the first 3-D view pixel data and the second view pixel data in the one or more video frames. In instances that the determined arrangement is not a desired arrangement, the video processing system may be operable to convert the one or more video frames to the desired arrangement. Either or both of the determined arrangement and the desired arrangement may comprise a series of two single-view frames. Either or both of the determined arrangement and the desired arrangement may comprise a single frame comprising the first 3-D view pixel data and the second 3-D view pixel data.

US Patent:

20110134212, Jun 9, 2011

Filed:

Dec 8, 2010

Appl. No.:

12/963320

Inventors:

Darren Neuman - Palo Alto CA, US
Jason Herrick - Pleasanton CA, US
Christopher Payson - Bolton MA, US
Qinghua Zhao - Cupertino CA, US

International Classification:

H04N 13/00

US Classification:

348 42, 348E13064

Abstract:

A video processing system may receive a first frame comprising pixel data for a first 3-D view of an image, which may be referred to as first 3-D view pixel data, and receive a second frame comprising pixel data for a second 3-D view of the image, which may be referred to as second 3-D view pixel data. The system may generate a multi-view frame comprising the first 3-D view pixel data and the second 3-D view pixel data. The system may make a decision for performing processing of the image, wherein the decision is generated based on one or both of the first 3-D view pixel data and/or the second 3-D view pixel data. The system may process the 3-D multi-view frame based on the decision. The image processing operation may comprise, for example, deinterlacing, filtering, and cadence processing such as 3:2 pulldown.