Craig A Covert

US Patent:

6750711, Jun 15, 2004

Filed:

Apr 13, 2001

Appl. No.:

09/835249

Inventors:

Yogendra K. Chawla - Pittsford NY
Aaron Radomski - Wyoming NY
Craig A. Covert - Rochester NY

Assignee:

ENI Technology, Inc. - Rochester NY

International Classification:

H03F 3217

US Classification:

330251, 330207 A

Abstract:

A high efficiency stable RF power amplifier with frequency tuning capability is disclosed. The present invention includes a novel circuit configuration which allows the drain or collector terminal of the power transistor to be at ground potential eliminating the need for an electrical insulator between the transistor and the heatsink. In an alternative embodiment, the source or emitter terminal of the power transistor is allowed to be at ground potential. In either case, the amplifier is operated in a switched mode to provide high efficiency amplification at a predetermined frequency band. Additionally, despite the switched mode operation, the amplifier is stable because properly controlled impedances are provided for baseband, sub-harmonic and harmonic frequencies.

US Patent:

60466413, Apr 4, 2000

Filed:

Jul 22, 1998

Appl. No.:

9/121136

Inventors:

Yogendra K. Chawla - Pittsford NY
Craig A. Covert - Rochester NY

Assignee:

ENI Technologies, Inc. - Rochester NY

International Classification:

H03F 316
H03F 326
H03F 314

US Classification:

330277

Abstract:

A high power grounded-drain source follower RF amplifier circuit employs a high voltage MOSFET. The RF signal at the input is applied with respect to ground via an isolation transformer whose secondary feeds the signal between gate and source. The output is taken from the source with respect to drain, which is grounded. A 13. 56 MHz 3 KW power amplifier topology with isolated RF input drive for each MOSFET die uses a pair of kilowatt power transistors or KPTs, in which there are multiple large area MOSFET dies, with the drain regions of the dies being formed over a major portion of the die lower surface. The drain regions are in direct electrical and thermal contact with the conductive copper flange. The source and gate regions are formed on the dies away from the flat lower surface. One or more pairs of multi-chip KPTs can be configured to design stable 2.