Semiconductor device processing and methods for dicing a semiconductor wafer into a plurality of individual dies that can have back surface metallization are described. The methods comprise providing a wafer with pre-diced streets in the wafer's front surface, applying a sidewall masking mechanism to the front surface of the wafer so as to substantially fill the pre-diced streets, thinning the back surface of the wafer so as to dice the wafer (e. g. , by grinding, etching, or both) and expose a portion of the sidewall masking mechanism from the back surface of the wafer, and applying a material, such as metal, to the back surface of the diced wafer. These methods can prevent the metal from being deposited on die sidewalls and may allow the separation of individual dies without causing the metal to peel from the back surface of one or more adjacent dies. Other embodiments are also described.
Craig W. Hendricks - West Valley City UT, US Eric Woolsey - Salt Lake City UT, US Jim Murphy - South Jordan UT, US
International Classification:
H01L 21/302
US Classification:
438462, 257E21214
Abstract:
Semiconductor device processing and methods for dicing a semiconductor wafer into a plurality of individual dies that can have back surface metallization are described. The methods comprise providing a wafer with pre-diced streets in the wafer's front surface, applying a sidewall masking mechanism to the front surface of the wafer so as to substantially fill the pre-diced streets, thinning the back surface of the wafer so as to dice the wafer (e.g., by grinding, etching, or both) and expose a portion of the sidewall masking mechanism from the back surface of the wafer, and applying a material, such as metal, to the back surface of the diced wafer. These methods can prevent the metal from being deposited on die sidewalls and may allow the separation of individual dies without causing the metal to peel from the back surface of one or more adjacent dies. Other embodiments are also described.
Name / Title
Company / Classification
Phones & Addresses
Craig Hendricks
B & C HOME REPAIR LLC
Craig R. Hendricks President
Coaching Institute, Inc Management Consulting Services
PO Box 1232, Draper, UT 84020 11734 S Elctn Rd, Draper, UT 84020
Custom Logistix
Owner
Inxpress Sep 2009 - Apr 2016
Franchise Owner and Certified International Specialist
Coaching Institute 1998 - 2008
Chief Executive Officer
Berkshire Hathaway Homeservices Elite Real Estate 1998 - 2008
Real Estate Investor, Trainer, Agent
Warever Corporation 1994 - 1998
Chief Executive Officer
Education:
Brigham Young University 1990 - 1992
Master of Business Administration, Masters
Brigham Young University 1984 - 1990
Bachelors, Accounting
Skills:
Training Leadership Management Team Building New Business Development Operations Management Negotiation Contract Negotiation Account Management Business Development International Shipping Entrepreneurship Freight Shipping Crm Logistics Sales Management Strategic Partnerships Logistics Management Sports Coaching Sales Presentations Forecasting Financial Analysis and Accounting Professional Speaking and Training Joint Ventures and Strategic Partnerships Direct Sales and Seminar Management Finance/Operations/Budgeting Negotiation of Contracts and Partnerships Restructuring Operations and Processes Public Entity Reporting Coaching and Personal Development Soccer Coaching Financial Services Insurance Pensions
Capital Cleaning Slc
Director of Business Development
Fairchild Semiconductor Mar 1978 - Mar 2014
Assistant Technology Development Engineer
Fairchild Semiconductor 1978 - 2011
Td Engineering Technician
Education:
Salt Lake Community College
Skills:
Spc Semiconductors Semiconductor Industry Jmp Design of Experiments Failure Analysis Analog Ic Silicon Mixed Signal Yield Pvd Engineering Management Cvd Engineering Product Engineering Metrology Thin Films Plasma Etch Cmos Etching Process Integration Process Engineering Root Cause Analysis Semiconductor Process Microelectronics Mems Diffusion Photolithography Power Management Characterization Lithography Test Engineering