Cynthia K Lee

US Patent:

7633152, Dec 15, 2009

Filed:

Aug 31, 2006

Appl. No.:

11/468901

Inventors:

Cynthia C. Lee - Fogelsville PA, US
Sidhartha Sen - Allentown PA, US

Assignee:

Agere Systems Inc. - Allentown PA

International Classification:

H01L 23/10

US Classification:

257706, 257707, 257713, 257722, 257723, 257724, 257796, 257E23051

Abstract:

The present invention provides an integrated circuit and method of manufacture therefore. The integrated circuit, in one embodiment, includes heat conducting elements located proximate a plurality of heat generating components located over a substrate. The integrated circuit may further include a heat radiating element comprising one or more fins in thermal communication and physical contact with the heat conducting elements, the heat radiating element configured to dissipate heat generated by the heat generating components away from the integrated circuit.

US Patent:

20080072205, Mar 20, 2008

Filed:

Sep 18, 2006

Appl. No.:

11/522733

Inventors:

Edward B. Harris - Fogelsville PA, US
Cynthia C. Lee - Fogelsville PA, US
Gerard Zaneski - Macungie PA, US

International Classification:

G06F 17/50

US Classification:

716 18

Abstract:

Methods and apparatus are provided for designing a logic circuit using one or more circuit elements having a substantially continuous range of values. A circuit is designed based on a functional description of the circuit and one or more circuit constraints. The circuit is initially designed using a library of discrete circuit element options. The initial circuit design is evaluated to determine whether one or more discrete circuit elements cause the circuit to not satisfy the one or more circuit constraints, such as power, area or timing requirements for the circuit. At least one replacement circuit element is generated that has at least one cell parameter configured such that the at least one replacement circuit element will have a performance characteristic that allows the circuit to satisfy the one or more circuit constraints. The at least one cell parameter for the at least one replacement circuit element is configurable so that the performance characteristic can be selectable from a substantially continuous range of values. The at least one of the discrete circuit elements is replaced in the circuit with at least one of the replacement circuit elements.

US Patent:

20140095140, Apr 3, 2014

Filed:

Mar 15, 2013

Appl. No.:

13/838268

Inventors:

- San Jose CA, US
Kausar Banoo - Allentown PA, US
Cynthia Lee - Fogelsville PA, US
David Averill Bell - Lower Milford Township PA, US

Assignee:

LSI CORPORATION - San Jose CA

International Classification:

G06F 17/50

US Classification:

703 14

Abstract:

A method of determining a saturation current degradation that includes measuring, for a MOS integrated circuit fabrication process, a first dependence of a saturation current (I) degradation with gate voltage (V) at a level that causes Idegradation by bias temperature instability (BTI). A second dependence of the saturation current (I) recovery versus gate voltage (V) is also measured for the MOS integrated circuit fabrication process. A recovery voltage threshold value is determined. The recovery voltage threshold value is indicative of Vvoltages below which BTI recovery occurs. A circuit having at least one MOS transistor that includes a first MOS transistor is simulated. Based on the results of the simulation, a BTI recovery factor is calculated based on an amount of time the Vof the first MOS transistor is below the recovery voltage threshold value.