Dan Perry Robbins

US Patent:

60022809, Dec 14, 1999

Filed:

Apr 24, 1997

Appl. No.:

8/842441

Inventors:

Dan Robbins - Durham NC
Scott Tucker - Raleigh NC
James C. Morizio - Durham NC

Assignee:

Mitsubishi Semiconductor America, Inc. - Durham NC

International Classification:

H03L 706

US Classification:

327156

Abstract:

A circuit and method for compensating for the output phase delay of an external clock signal utilizes a phase-locked loop that includes an output port of an integrated circuit device. In the phase-locked loop, a phase detecting circuit compares the external clock signal with an output signal from the output port, producing a phase error signal. The phase error signal is applied to a skew compensator to generate an internal clock signal. The internal clock signal is fed back through the output port to the phase detecting circuit. Clock jitter is reduced by reducing the gain of the skew compensator after a phase lock condition occurs in the compensation circuit.