Daniel J Simon

US Patent:

7423467, Sep 9, 2008

Filed:

May 30, 2006

Appl. No.:

11/443813

Inventors:

Daniel L. Simon - Glendale AZ, US

Assignee:

National Semiconductor Corporation - Santa Clara CA

International Classification:

H03K 3/017

US Classification:

327175, 327172

Abstract:

A circuit for controlling a duty cycle of a clock signal. The circuit includes a duty cycle control loop that includes a voltage-to-duty cycle (V-to-DC) converter, an output driver, a duty-cycle-to voltage (DC-to-V) converter, and an operational amplifier. The V-to-DC converter receives an input clock signal. The output driver is coupled to the V-to-DC converter and provides an output clock signal that is associated with a duty cycle distortion value. The DC-to-V converter converts the output clock signal to an average voltage. The operational amplifier amplifies an error between the average voltage and a reference voltage. The error is fed back to the V-to-DC converter through a negative feedback loop, wherein the V-to-DC converter adjusts a duty cycle of the input clock signal based on the error.

US Patent:

7826582, Nov 2, 2010

Filed:

Sep 18, 2006

Appl. No.:

11/523123

Inventors:

Mark D. Kuhns - Peoria AZ, US
Daniel L. Simon - Glendale AZ, US

Assignee:

National Semiconductor Corporation - Santa Clara CA

International Classification:

H03D 3/24
H04L 7/00
H03L 7/06
H03L 7/00

US Classification:

375375, 375376, 375371, 375373, 327146, 327147, 327149, 327150, 327152, 327153, 327156, 327157, 327158, 327159

Abstract:

A system and method for performing output clock phase smoothing. A phase smoothing circuit is described and includes a numerically-controlled oscillator (NCO) configured to produce a plurality of NCO clock pulses at a selectable frequency that is based on an input clock. Edges of the plurality of NCO clock pulses are aligned to edges of the input clock. A phase error calculation module is coupled to the NCO and is configured to generate a corresponding phase error for each of the plurality of NCO clock pulses. A clock phase selectable delay is coupled to the phase error calculation module and is configured to adjust each of the plurality of NCO clock pulses according to the corresponding phase error to generate an output clock at the selectable frequency that are phase-adjusted to more closely match an ideal output clock phase. Edges of the output clock need not necessarily align to the edges of the input clock.

US Patent:

8289257, Oct 16, 2012

Filed:

May 30, 2006

Appl. No.:

11/443798

Inventors:

Daniel L. Simon - Glendale AZ, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

G09G 3/36

US Classification:

345 99, 330 69

Abstract:

A circuit for reducing and offsetting the voltage swing of a differential pre-drive circuit. The circuit includes a first H-bridge of transistors receiving a differential pair of input signals. A swing resister is coupled to the H-bridge for reducing a voltage swing of the differential pair of input signals. The reduced swing is generated as a differential pair of output signals. Also, the differential pre-drive circuit includes an offset resistor that is coupled to the H-bridge. The offset resistor acts to offset the differential pair of output signals. As such, the differential pair of output signals having reduced swing and offset as applied to gates of output transistors in an output stage allow the output transistors to remain in the saturation operating state.

US Patent:

20220407341, Dec 22, 2022

Filed:

Oct 30, 2020

Appl. No.:

17/755494

Inventors:

- Glenwillow OH, US
James Richard STANFIELD - Glendale AZ, US
Daniel SIMON - Phoenix AZ, US
Jonathan Lewis NOOK - Gates Mills OH, US
Derek Michael UNDERHILL - Tempe AZ, US

Assignee:

THE NOCO COMPANY - Glenwillow OH

International Classification:

H02J 7/00
G01K 1/02
G01R 31/3835
H01M 10/44

Abstract:

A battery charging device for charging a discharged or depleted battery, the device including one or more temperature sensors for measuring or approximating a temperature of the discharged or depleted battery and a controller receiving input signals from the one or more temperature sensors for compensating a charging operation of the battery charging device.

US Patent:

20160297875, Oct 13, 2016

Filed:

Dec 8, 2014

Appl. No.:

15/102453

Inventors:

- Cleveland OH, US
Daniel I. Simon - Moreland Hills OH, US

International Classification:

C07K 16/18
G01N 33/68
A61K 38/17

Abstract:

A method of inhibiting hypercoagulation and/or thrombosis in a subject having or at risk of hypercoagulation or thrombosis includes administering to the subject an amount of a composition effective to inhibit MRP-8/14 and/or MRP-14 binding to platelet CD36 and inhibit hypercoagulation and/or thrombosis in the subject.

US Patent:

20150337039, Nov 26, 2015

Filed:

May 22, 2015

Appl. No.:

14/719984

Inventors:

- Cleveland OH, US
Daniel I. Simon - Cleveland OH, US

International Classification:

C07K 16/28

Abstract:

A method of treating a subject having or at risk of a disease or disorder associated with aberrant leukocyte-platelet interactions includes administering to the subject a therapeutically effective amount of a monoclonal antibody or antigen binding portion thereof that specifically binds to at least one of SEQ ID NO: 1, SEQ ID NO: 2, or SEQ ID NO: 3 to inhibit leukocyte arrest on adherent platelets in the subject.