David Issac Baer

US Patent:

7230987, Jun 12, 2007

Filed:

Feb 24, 2003

Appl. No.:

10/374734

Inventors:

Jason Demas - Irvine CA, US
Honman Law - Aliso Viejo CA, US
David Baer - San Jose CA, US
Brian Schoner - Fremont CA, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H04N 7/12

US Classification:

37524028, 37524025

Abstract:

An integrated receiver with multiple, independently synchronized clock signals for multiple channel transport stream decoding and delivery substantially implemented on a single CMOS integrated circuit is described. An integrated circuit that services two satellite programs must generate and distribute corresponding time domain clocks to the various components of the integrated circuit. The transport block that receives one or more satellite signals from a demodulating block will extract program clock recover values from each signal being decoded and use these values to produce an error signal or control word that serves as an input to a clock generator. Based upon this input, the clock circuit will produce a corresponding time domain clock for each channel serviced by the integrated circuit. The output of the clock circuit is distributed to the various processing blocks within the integrated circuit that operate upon channel content received and processed by the transport block.

US Patent:

7533402, May 12, 2009

Filed:

Feb 24, 2003

Appl. No.:

10/374768

Inventors:

Jason Demas - Irvine CA, US
Honman Law - Aliso Viejo CA, US
David Baer - San Jose CA, US
Brian Schoner - Fremont CA, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H04N 7/20
H04N 7/12
H04N 11/02
H04N 11/12
H04N 5/06
H04N 5/44
H04N 5/66
H04J 3/04
G09G 5/00

US Classification:

725 71, 725 63, 725 68, 37524025, 37524028, 348492, 348521, 348725, 348739, 370535, 345 11

Abstract:

An integrated receiver with dual channel transport stream decoding and delivery substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides multiple time-base clocks for two transport streams. Transport processor circuitry uses multiple PCRs to track transport streams through decoding, storage and or delivery of the decoded signals for display. Provision of a multiple time-base clock for decoding and delivering multiple transport streams allows display of the two decoded audio-video signals on independent monitors.

US Patent:

8050330, Nov 1, 2011

Filed:

May 17, 2007

Appl. No.:

11/804651

Inventors:

Jason Demas - Irvine CA, US
Honman Law - Aliso Viejo CA, US
David Baer - San Jose CA, US
Brian Schoner - Fremont CA, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H04N 7/18

US Classification:

37524028, 37524025

Abstract:

An integrated receiver with multiple, independently synchronized clock signals for multiple channel transport stream decoding and delivery substantially implemented on a single CMOS integrated circuit is described. An integrated circuit that services two satellite programs must generate and distribute corresponding time domain clocks to the various components of the integrated circuit. The transport block that receives one or more satellite signals from a demodulating block will extract program clock recover values from each signal being decoded and use these values to produce an error signal or control word that serves as an input to a clock generator. Based upon this input, the clock circuit will produce a corresponding time domain clock for each channel serviced by the integrated circuit. The output of the clock circuit is distributed to the various processing blocks within the integrated circuit that operate upon channel content received and processed by the transport block.