David L Baldwin

US Patent:

6496514, Dec 17, 2002

Filed:

Dec 4, 2000

Appl. No.:

09/730149

Inventors:

Sam Su - Irvine CA
David Baldwin - Irvine CA
Qing Xue - Irvine CA
Hossein Hashemi - Mission Viejo CA

Assignee:

Emulex Corporation - Costa Mesa CA

International Classification:

H04L 1242

US Classification:

370452, 370462

Abstract:

A hub port in a Fibre Channel loop for detecting and bypassing attached node ports in an OLD-PORT state is disclosed. The hub port includes a hub data source, a detect circuits, and an output control circuit. The hub data source supplies data to the hub port from a Fibre Channel loop. The detect circuit is configured to detect a valid non-Arbitrated Loop sequence from an attached node port indicating that the node port is in an OLD-PORT state. The output control circuit operates to bypass the node port from the loop when the valid non-Arbitrated Loop sequence is detected.

US Patent:

7035206, Apr 25, 2006

Filed:

May 4, 2001

Appl. No.:

09/849102

Inventors:

David Brewer - Anaheim CA, US
Karl M. Henson - Rancho Santa Margarita CA, US
Hossein Hashemi - Mission Viejo CA, US
David Baldwin - Irvine CA, US

Assignee:

Emulex Design & Manufacturing Corporation - Costa Mesa CA

International Classification:

G01R 31/08

US Classification:

370222, 225245, 225463, 225522, 714 4

Abstract:

A loop network hub port with an automatic bypass feature. The automatic bypass feature causes the hub port to enter a bypass mode upon detection of a specified loop failure initialization sequence from a node port attached to the hub port. The hub port does not propagate loop failure initialization data generated by the attached node port upon the failure of a data channel from the hub port to the node port. The hub port replaces loop failure initialization data received from the node port with buffer data and conceals the node port failure from the remainder of the loop. Upon detection of the loop failure initialization sequence received from the attached node port, the hub port enters a bypass mode and maintains that bypass mode until a recovery sequence is received from the node port. At that point, the hub port reinserts the node port into the loop.

US Patent:

7430928, Oct 7, 2008

Filed:

Feb 8, 2006

Appl. No.:

11/350716

Inventors:

Jay W. Grate - West Richland WA, US
David L. Baldwin - Kennewick WA, US

Assignee:

Battelle Memorial Insititute - Richland WA

International Classification:

G01N 1/00

US Classification:

7386321

Abstract:

An apparatus and method are disclosed for pre-concentrating gaseous vapors for analysis. The invention finds application in conjunction with, e. g. , analytical instruments where low detection limits for gaseous vapors are desirable. Vapors sorbed and concentrated within the bed of the apparatus can be thermally desorbed achieving at least partial separation of vapor mixtures. The apparatus is suitable, e. g. , for preconcentration and sample injection, and provides greater resolution of peaks for vapors within vapor mixtures, yielding detection levels that are 10-10,000 times better than for direct sampling and analysis systems. Features are particularly useful for continuous unattended monitoring applications.

US Patent:

8191435, Jun 5, 2012

Filed:

Aug 8, 2008

Appl. No.:

12/188987

Inventors:

Jay W. Grate - West Richland WA, US
David L. Baldwin - Kennewick WA, US

Assignee:

Battelle Memorial Institute - Richland WA

International Classification:

G01N 1/00

US Classification:

7386321

Abstract:

A pre-concentration device and a method are disclosed for concentrating gaseous vapors for analysis. Vapors sorbed and concentrated within the bed of the pre-concentration device are thermally desorbed, achieving at least partial separation of the vapor mixtures. The pre-concentration device is suitable, e. g. , for pre-concentration and sample injection, and provides greater resolution of peaks for vapors within vapor mixtures, yielding detection levels that are 10-10,000 times better than direct sampling and analysis systems. Features are particularly useful for continuous unattended monitoring applications. The invention finds application in conjunction with, e. g. , analytical instruments where low detection limits for gaseous vapors are desirable.

US Patent:

8635387, Jan 21, 2014

Filed:

Oct 9, 2009

Appl. No.:

12/577031

Inventors:

Qiang Liu - Irvine CA, US
Allen Russell Andrews - El Cajon CA, US
David Bradley Baldwin - Irvine CA, US

Assignee:

Emulex Design & Manufacturing Corporation - Costa Mesa CA

International Classification:

G06F 3/00
G06F 13/24

US Classification:

710 48, 710260

Abstract:

Disclosed herein is a method for improving Input/Output (I/O) performance in a host system having multiple CPUs. Under this method, various interrupt affinity schemes are provided, which associate multiple processors, interrupts, and I/O channels for sending the interrupts, thereby allowing the interrupts to be almost evenly loaded among the multiple I/O channels and processors. Also, data locality (“warm cache”) can be achieved through the interrupt affinity schemes that associate each interrupt to its source processor, namely, the processor originating the I/O request that results in the interrupt.

US Patent:

61011665, Aug 8, 2000

Filed:

May 1, 1998

Appl. No.:

9/071288

Inventors:

David Baldwin - Irvine CA
David Brewer - Anaheim CA

Assignee:

Emulex Corporation - Costa Mesa CA

International Classification:

G01R 3108
H04J 314

US Classification:

370222

Abstract:

A hub port in a hub of a loop network which automatically bypasses a node port which is generating a particular loop failure initialization sequence. The hub port contains a detection circuit which enables the hub port to detect loop failure initialization data received from its attached node port. Upon detecting such data from an attached node port, the hub port replaces such data with buffer data to be passed to the next hub port. Upon detecting the completion of a loop failure initialization sequence from an attached node port, the hub port enters a bypass mode. The hub port no longer passes on output from its attached node port and instead forwards along the internal hub link data received from the previous hub port in the hub loop. The bypass is maintained until the hub port receives a primitive sequence indicating the recovery of the attached node port. The hub port periodically sends at least one recovery sequence to the node port.

US Patent:

43969917, Aug 2, 1983

Filed:

Apr 7, 1981

Appl. No.:

6/251805

Inventors:

David R. Baldwin - Phoenix AZ
Nicholas S. Lemak - Phoenix AZ

Assignee:

Honeywell Information Systems Inc. - Phoenix AZ

International Classification:

G06F 1520
H03B 304

US Classification:

364736

Abstract:

A long term response enhancement for a digital phase-locked loop is implemented to provide a relatively minor change in the phase of the output signal over a relatively long period of time. The basic digital phase-locked loop determines the average number of pulses from a clock source which occur or are expected to occur between successive occurrences of the input signal to the digital phase-locked loop, and compares the number of pulses counted from the occurrence of the last output signal with the average number of pulses expected to occur between successive input signals, producing an output signal when the two numbers agree. The present invention modifies the average count prior to comparison with the number of pulses counted from the occurrence of the last output signal, by adding a one or a zero to the average count, based upon comparison of the previous two averages present during the previous two cycles of the input signal with the current average, with either a one or a zero added to the comparison number, thereby providing for slight modification of the time at which the output signal would be produced.

US Patent:

44411952, Apr 3, 1984

Filed:

Jul 10, 1981

Appl. No.:

6/251846

Inventors:

David R. Baldwin - Phoenix AZ
Nicholas S. Lemak - Phoenix AZ

Assignee:

Honeywell Information Systems Inc. - Phoenix AZ

International Classification:

H03L 718

US Classification:

377 2

Abstract:

A short term response enhancement for a digital phase-locked loop is implemented to provide a relatively major change in the phase of the output signal over a relatively short period of time. The basic digital phase-locked loop determines the average number of pulses from a clock source which occur or are expected to occur between successive occurrences of the input signal to the digital phase-locked loop, and compares the number of pulses counted from the occurrence of the last output signal with the average number of pulses expected to occur, producing an output signal when the two numbers agree. The number of pulses which occur between successive cycles of the input signal are also compared against the previously determined average. A count which differs from the average count indicates a change in phase of the input signal. The present invention takes the absolute value of the measured error and, based upon the prior modification made during the previous two cycles of the input signal to the count sequence modifies the count sequence of the counter which is counting the number of pulses from the last output signal, by either adding one or subtracting one from the count sequence, thereby effecting a relatively major change in the phase of the output signal over a relatively short period of time.