David John Craft

US Patent:

6609149, Aug 19, 2003

Filed:

Apr 12, 1999

Appl. No.:

09/289887

Inventors:

Daniel Quinto Bandera - Austin TX
David Jones Craft - Austin TX
Wade David Shaw - Austin TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1516

US Classification:

709219, 710 58, 714 12, 725 87

Abstract:

A first frame deadline is calculated and attached to an I/O request for prioritizing and retrieving video data frames from a shared disk cluster. Disk adapters queue video data frame requests according to the deadline incorporated in the frame requests. Data frames are transmitted to a requesting end user utilizing the attached deadline time to schedule the frames according to a time priority. Alternatively, a âslackâ time is computed and utilized to determine when the first frame and subsequent frames of the requested video data may be retrieved from disk and present in the video servers memory in order to avoid a visible delay in sending that frame to the end user.

US Patent:

6678768, Jan 13, 2004

Filed:

Oct 6, 2000

Appl. No.:

09/680605

Inventors:

David John Craft - Austin TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1300

US Classification:

710100, 711114, 711112, 710 5

Abstract:

A method and apparatus for configuring redundant array of independent disks (RAID) are disclosed. A RAID includes a processor tray having a host processor, and a drive tray having a bridge chip and multiple attachment chips. The attachment chips are connected to each other in a loop configuration. Each of the attachment chips, which is assigned with an unique node ID, is connected to a respective disk drive. The host processor can direct more than one attachment chip to participate, in various ways, to a single data transfer around the loop. This is accomplished by directing the data transfer to a specified node ID, after configuring all the other attachment chips with temporary alias node ID identical to the specified node ID to which the data transfer operation is directed.

US Patent:

6697974, Feb 24, 2004

Filed:

Mar 14, 2001

Appl. No.:

09/804799

Inventors:

David John Craft - Austin TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06K 504

US Classification:

714700

Abstract:

A method for adaptively compensating skews during data transmission on a bus is disclosed. A bus includes one or more groups of multiple signal paths. Each of the signal paths within a group is assigned a unique binary data value. During data transmissions, only one signal path within each group is activated at a time, and each activation of one of the signal paths represents its associated unique binary data value. Thus, a sequence of consecutive activations represents the same information as if the data were transmitted in parallel. Before signal transmission, a time delay between a transition on a first and a second of the signal lines is measured by utilizing a control frame. The time delay measurement is repeated to establish the relative time delays associated with all possible transitions on all the signal lines. In response to the measured time delays, an appropriate compensating delay is introduced accordingly before launching each transition on the signal lines. Such added delay compensates for the differences in delay (or skew) between the different transitions travelling along different signal paths.

US Patent:

6771193, Aug 3, 2004

Filed:

Aug 22, 2002

Appl. No.:

10/226963

Inventors:

David John Craft - Austin TX

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H03M 740

US Classification:

341 67, 341 51

Abstract:

An encoder for compressing data is described, including a history buffer having multiple storage locations for storing target data units. The encoder is configured to input a target data string including multiple target data units, and additional data (e. g. , security data associated with the target data string). In the event the history buffer contains multiple matching strings that match the target data string, the encoder is configured to select a displacement value of one of the matching strings dependent on a portion of the additional data, and to produce a copy pointer corresponding to the target data string and including the selected displacement. The selected displacement value in the copy pointer conveys the portion of the additional data. A decoder for decompressing data is also described, including a history buffer having multiple storage locations for storing data units. The decoder is configured to input a copy pointer including a displacement value indicative of a location of a first data unit of a data string in the history buffer, to use the displacement value to determine the data string, and to use the displacement value to determine a value of a quantity of additional data conveyed by the displacement value in the event multiple copies of the data string exist in the history buffer.

US Patent:

6961852, Nov 1, 2005

Filed:

Jun 19, 2003

Appl. No.:

10/464884

Inventors:

David Craft - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F017/00

US Classification:

713168, 713172, 713150

Abstract:

A processing unit includes a read-only encryption key. Loader code image is loaded into system memory from non-volatile storage. Loader code image includes a prefix value and a suffix value. The prefix value is combined with the master key from the processing unit to create a random value that is the seed for a hashing algorithm. The hashing algorithm uses the seed value with a signature formed from the blocks of code to form a result. During the hashing algorithm, intermediate key values are generated and stored in a memory area inaccessible by the user. The intermediate key values are used by the loader code after the loader has been authenticated and loaded. The loader combines one or more of the intermediate key values with prefix and suffix values that correspond to other software modules to authenticate the software, using a hashing algorithm, and load the software upon authentication.

US Patent:

6996233, Feb 7, 2006

Filed:

Jun 19, 2003

Appl. No.:

10/464891

Inventors:

Daniel Alan Brokenshire - Round Rock TX, US
David Craft - Austin TX, US
Harm Peter Hofstee - Austin TX, US
Mohammad Peyravian - Morrisville NC, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H04L 9/00
H04K 1/00

US Classification:

380 28, 380259

Abstract:

A method and system for encrypting and verifying the integrity of a message using a three-phase encryption process is provided. A source having a secret master key that is shared with a target receives the message and generates a random number. The source then generates: a first set of intermediate values from the message and the random number; a second set of intermediate values from the first set of values; and a cipher text from the second set of values. At the three phases, the values are generated using the encryption function of a block cipher encryption/decryption algorithm. The random number and the cipher text are transmitted to the target, which decrypts the cipher text by reversing the encryption process. The target verifies the integrity of the message by comparing the received random number with the random number extracted from the decrypted cipher text.

US Patent:

7003605, Feb 21, 2006

Filed:

Sep 12, 2002

Appl. No.:

10/242522

Inventors:

David John Craft - Austin TX, US
Charles Ray Johns - Austin TX, US

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 13/42

US Classification:

710106, 710 65, 710105

Abstract:

The present invention provides employing differential transitional encoding with a differential bus. Employing the differential transitional encoding comprises dividing the differential bus into one or more groups comprising four bus lines. Employment of the differential bus also comprises asserting half the bus lines of a group during a bus data transfer, thereby defining an asserted set of bus lines and a de-asserted set of bus lines. The method and system further comprises transmitting data by differentially driving two of the bus lines, one bus line per set, by de-asserting one of the bus lines of the asserted set, and asserting one of the bus lines of the de-asserted set.

US Patent:

7146466, Dec 5, 2006

Filed:

Mar 23, 2004

Appl. No.:

10/807552

Inventors:

David J. Craft - Austin TX, US
Brian P. Dixon - Austin TX, US
Yuri L. Volobuev - Austin TX, US
James C. Wyllie - Monte Sereno CA, US

Assignee:

International Business Machines - Armonk NY

International Classification:

G06F 12/12

US Classification:

711133, 711156

Abstract:

A system for balancing multiple memory buffer sizes includes a memory partitioned into a plurality of subgroups, each subgroup containing similarly sized buffers. The system further includes a memory manager which manages requests for buffer space by storing and accessing buffer steal history records in a buffer steal history queue.