David A Dougherty

US Patent:

7423804, Sep 9, 2008

Filed:

Oct 4, 2005

Appl. No.:

11/243021

Inventors:

Daniel Al-Salameh - Marlboro NJ, US
David J. Dougherty - Mountain View CA, US

Assignee:

JDS Uniphase Corporation - Milpitas CA

International Classification:

H01S 3/00

US Classification:

359337, 3593371

Abstract:

A method and apparatus for monitoring spectral tilt uses an arrayed waveguide grating (AWG) to separate a multiplexed optical signal having a plurality of wavelength channels into a plurality of sub-bands, where each sub-band spans a different wavelength range and includes more than one wavelength channel. A photodetector array is provided to measure the optical power in each of the sub-bands, while control electronics calculate spectral tilt of the multiplexed optical signal using the measured optical power in each of the sub-bands. The spectral tilt monitor in accordance with the instant invention provides spectral resolution, increased monitoring speeds, and decreased manufacturing costs.

US Patent:

7768697, Aug 3, 2010

Filed:

Aug 5, 2008

Appl. No.:

12/185893

Inventors:

Daniel Al-Salameh - Marlboro NJ, US
David J. Dougherty - Mountain View CA, US

Assignee:

JDS Uniphase Corporation - Milpitas CA

International Classification:

H01S 3/00

US Classification:

359333, 385 37, 385 48

Abstract:

A method and apparatus for monitoring spectral tilt uses an arrayed waveguide grating (AWG) to separate a multiplexed optical signal having a plurality of wavelength channels into a plurality of sub-bands, where each sub-band spans a different wavelength range and includes more than one wavelength channel. A photodetector array is provided to measure the optical power in each of the sub-bands, while control electronics calculate spectral tilt of the multiplexed optical signal using the measured optical power in each of the sub-bands. The spectral tilt monitor in accordance with the instant invention provides spectral resolution, increased monitoring speeds, and decreased manufacturing costs.

US Patent:

20230004389, Jan 5, 2023

Filed:

Jun 25, 2021

Appl. No.:

17/358231

Inventors:

- Santa Clara CA, US
Zoran Zivkovic - Hertogenbosch, NL
Jian-Guo Chen - Basking Ridge NJ, US
Hong Wan - Allentown PA, US
David Dougherty - Allentown PA, US
Jay O'neill - Nesquehoning PA, US

International Classification:

G06F 9/30

Abstract:

Techniques are disclosed for the use of fused vector processor instructions by a vector processor architecture. Each fused vector processor instruction may include a set of fields associated with individual vector processing instructions. The vector processor architecture may implement local buffers facilitating a single vector processor instruction to be used to execute each of the individual vector processing instructions without re-accessing vector registers between each executed individual vector processing instruction. The vector processor architecture enables less communication across the interconnection network, thereby increasing interconnection network bandwidth and the speed of computations, and decreasing power usage.