David W Farrell

US Patent:

6516063, Feb 4, 2003

Filed:

Mar 24, 2000

Appl. No.:

09/535305

Inventors:

David S. Farrell - Lisle IL
Tianfang Liu - De Kalb IL

Assignee:

Tellabs Operations, Inc. - Naperville IL

International Classification:

H04M 908

US Classification:

37940608, 37940601

Abstract:

A non-linear processor for use in an echo canceller is set forth. The non-linear processor includes a center clipping digital filter receiving an echo compensated signal. The non-linear processor provides a center clipped output signal having non-linear thresholds at values of +T and -T. The value of T is dynamically dependent, at least in part, on echo return loss measurements. To limit the processors susceptibility to corruption from double-talk conditions, the non-linear processor inhibits the dynamic setting of the T value when a double-talk condition is present. Additionally, or in the alternative, the non-linear processor locks the value of the echo return loss measurement after a predetermined number of consecutive echo return loss measurements have values falling within a predetermined range of one another. Such locking further reduces the susceptibility of the non-linear processor to corruption from double-talk conditions.

US Patent:

7020278, Mar 28, 2006

Filed:

Oct 15, 2002

Appl. No.:

10/271189

Inventors:

David S. Farrell - Lisle IL, US
Tianfang Liu - De Kalb IL, US

Assignee:

Tellabs Operations, Inc. - Naperville IL

International Classification:

H04M 1/00

US Classification:

37940605, 37940601, 37940604, 37940608

Abstract:

A non-linear processor for use in an echo canceller is set forth. The non-linear processor includes a center clipping digital filter receiving an echo compensated signal. The non-linear processor provides a center clipped output signal having non-linear thresholds at values of +Tand −T. The value of Tis dynamically dependent, at least in part, on echo return loss measurements. To limit the processor's susceptibility to corruption from double-talk conditions, the non-linear processor inhibits the dynamic setting of the Tvalue when a double-talk condition is present. Additionally, or in the alternative, the non-linear processor locks the value of the echo return loss measurement after a predetermined number of consecutive echo return loss measurements have values falling within a predetermined range of one another. Such locking further reduces the susceptibility of the non-linear processor to corruption from double-talk conditions.

US Patent:

7450714, Nov 11, 2008

Filed:

Jan 19, 2006

Appl. No.:

11/336348

Inventors:

David S. Farrell - Lisle IL, US
Tianfang Liu - De Kalb IL, US

Assignee:

Tellabs Operations, Inc. - Naperville IL

International Classification:

H04M /08

US Classification:

37940605, 37940602

Abstract:

A non-linear processor for use in an echo canceller is set forth. The non-linear processor includes a center clipping digital filter receiving an echo compensated signal. The non-linear processor provides a center clipped output signal having non-linear thresholds at values of +Tand −T. The value of Tis dynamically dependent, at least in part, on echo return loss measurements. To limit the processor's susceptibility to corruption from double-talk conditions, the non-linear processor inhibits the dynamic setting of the Tvalue when a double-talk condition is present. Additionally, or in the alternative, the non-linear processor locks the value of the echo return loss measurement after a predetermined number of consecutive echo return loss measurements have values falling within a predetermined range of one another. Such locking further reduces the susceptibility of the non-linear processor to corruption from double-talk conditions.

US Patent:

61988197, Mar 6, 2001

Filed:

Nov 14, 1997

Appl. No.:

8/970639

Inventors:

David S. Farrell - Lisle IL
Tianfang Liu - De Kalb IL

Assignee:

Tellabs Operations, Inc. - Lisle IL

International Classification:

H04M 900

US Classification:

379410

Abstract:

A non-linear processor for use in an echo canceller is set forth. The non-linear processor includes a center clipping digital filter receiving an echo compensated signal. The non-linear processor provides a center clipped output signal having non-linear thresholds at values of +T. sub. NLP and -T. sub. NLP. The value of T. sub. NLP is dynamically dependent, at least in part, on echo return loss measurements. To limit the processor's susceptibility to corruption from double-talk conditions, the non-linear processor inhibits the dynamic setting of the T. sub. NLP value when a double-talk condition is present. Additionally, or in the alternative, the non-linear processor locks the value of the echo return loss measurement after a predetermined number of consecutive echo return loss measurements have values falling within a predetermined range of one another. Such locking further reduces the susceptibility of the non-linear processor to corruption from double-talk conditions.

US Patent:

20170262160, Sep 14, 2017

Filed:

Mar 14, 2016

Appl. No.:

15/068947

Inventors:

- Schenectady NY, US
David Sean Farrell - Lisle IL, US

International Classification:

G06F 3/0484
G06F 3/0482
G06F 17/30
G06F 3/0488
H04L 29/08

Abstract:

Approaches are provided for an apparatus having an interface with an input and an output. The apparatus also includes a display device having a touch-sensitive user interface. The apparatus also includes a processor coupled to the interface and the display device. The processor is configured to display at the display device a first content pane, a second content pane, and a third content pane. The first content pane includes a case report received at the input of the interface. The case report represents characteristics of a case associated with an abnormality detected in an industrial machine or system. The second content pane includes a user input interface configured to receive a user input. The third content pane includes a response to the user input. The response is received at the input of the interface.

US Patent:

20170263103, Sep 14, 2017

Filed:

Mar 14, 2016

Appl. No.:

15/069046

Inventors:

- Schenectady NY, US
David Sean Farrell - Lisle IL, US

International Classification:

G08B 21/18
G05B 23/02
G07C 3/00

Abstract:

Approaches are provided for storing in a memory device a work plan and a case data structure associated with an industrial machine or system. The case data structure includes an impact field with an impact value, and an urgency field with an urgency value. A processor transmits via an output a case report to a plurality of local computing devices at a remote location. The case report is indicative of one or more characteristics of a case. The processor is further configured to receive via an input a plurality of transmissions from the plurality of local computing devices. Each of the transmissions are indicative of an assessed impact and an assessed urgency.