David M Kaffine

US Patent:

6654914, Nov 25, 2003

Filed:

May 28, 1999

Appl. No.:

09/322107

Inventors:

David M. Kaffine - North Billerica MA
Joseph S. Rosen - Chicago IL
Peter H. Schmidt - Lexington MA

Assignee:

Teradyne, Inc. - Boston MA

International Classification:

G06F 1130

US Classification:

714 43, 714 4, 714 41, 714 46

Abstract:

Techniques are provided for improved fault isolation and fault reduction. A system for use with a data network includes multiple diagnostic units each adapted to communicate with the network including to a network user. A central controller is operatively connected to the diagnostic units, the controller being adapted to communicate with and coordinate operations of the diagnostic units, to instruct the diagnostic units to perform tests adapted to help isolate a network fault, and to analyze test results received from a diagnostic unit to attempt to determine the network fault. Various methods for improving fault isolation and fault reduction are also provided.

US Patent:

6823479, Nov 23, 2004

Filed:

Feb 14, 2000

Appl. No.:

09/503352

Inventors:

David Kaffine - Billerica MA
Anthony C. Hughes - Belmont MA
William Minckler - Waltham MA
Neelesh Agrawal - Burlington MA
Peter H. Schmidt - Lexington MA

Assignee:

Teradyne, Inc. - Boston MA

International Classification:

G06F 1100

US Classification:

714 43, 714 4

Abstract:

A testing tool for Internet Service Provider (ISP) network engineers which is used to diagnose network faults, characterize network performance and evaluate new equipment and software releases. The tool can be used to schedule and run proactive tests to identify network problems before subscribers are affected. Further, the tool can be used to provide testing on demand to quickly isolate the root cause of a problem identified by the tool or by network management systems or subscribers. The tool is topology independent and thus does not have to be reconfigured as the network changes. The tool only sends traffic as directed by the network engineer and thus does not generate undesirable heavy network traffic loads, unless such a heavy network loads are desired by the network engineer.

US Patent:

7305466, Dec 4, 2007

Filed:

Apr 19, 2000

Appl. No.:

09/553447

Inventors:

David M. Kaffine - Billerica MA, US
Peter H. Schmidt - Lexington MA, US
Joseph S. Rosen - Chicago IL, US
Jonathan Wolf - Belmont MA, US
Arthur Mellor - Arlington MA, US

Assignee:

Teradyne, Inc. - Boston MA

International Classification:

G06F 15/173
G06F 13/10
G06F 11/00
G06F 15/16
G06F 9/44

US Classification:

709224, 709223, 709236, 703 21, 703 22, 703 24, 714 4, 714 25, 714 28, 714 37

Abstract:

Techniques are provided for improved fault isolation and fault reduction. A system for use with a data network includes multiple diagnostic units each adapted to communicate with the network including to a network user. A central controller is operatively connected to the diagnostic units, the controller being adapted to communicate with and coordinate operations of the diagnostic units, to instruct the diagnostic units to perform tests adapted to help isolate a network fault, and to analyze test results received from a diagnostic unit to attempt to determine the network fault. Various methods for improving fault isolation and fault reduction are also provided.

US Patent:

6421634, Jul 16, 2002

Filed:

Mar 4, 1999

Appl. No.:

09/262575

Inventors:

Glenn A. Dearth - Groton MA
David M. Kaffine - North Billerica MA
Janet Y. Zheng - Andover MA

Assignee:

Sun Microsystems, Inc. - Palo Alto CA

International Classification:

G06F 9455

US Classification:

703 14, 703 20, 714 26, 714 33, 714 38

Abstract:

A system and method for circuitry design verification testing using a structure of interface independent classes to provide for rapid prototyping and design modification while maximizing test code re-use. A circuit simulation subsystem is interfaced with a test subsystem. The test subsystem employs a system transaction class for collecting common routines and pointers to device transactions. One or more configuration transaction classes derived from the system transaction class define transactions between functional models within the simulation subsystem and cause instantiation of the respective functional models. Operations are performed on the functional models via pointers to interface independent transaction classes which define interfaces to the devices. The operations are mapped to the current designs of the functional models by subclasses of the interface independent transaction classes. Changes to the functional model designs necessitate changes to the subclasses, but the interface independent transaction classes maintain a consistent interface and allow the test code to be re-used with minimal changes.