David Wayne Kirk

US Patent:

53410513, Aug 23, 1994

Filed:

Nov 25, 1992

Appl. No.:

7/981763

Inventors:

David B. Kirk - South Pasadena CA

Assignee:

California Institute of Technology - Pasadena CA

International Classification:

H03F 345

US Classification:

307494

Abstract:

The circuit generates an output value of an N-dimensional basis function. The circuit includes a string of sub-circuits, each sub-circuit computing a one-dimensional basis function. Each lower dimension sub-circuit is coupled to the adjacent higher dimension circuit, such that the current output is utilized as the input bias current to the adjacent higher dimension circuit. The coupling of sub-circuits in this manner provides the computation of the product of the 1-dimension basis functions produced by each of the sub-circuits.

US Patent:

53294785, Jul 12, 1994

Filed:

Nov 25, 1992

Appl. No.:

7/981762

Inventors:

David B. Kirk - South Pasadena CA
Douglas A. Kerns - Pasadena CA
Brooke P. Anderson - Pasadena CA
Kurt Fleischer - Pasadena CA
Alan H. Barr - Pasadena CA

International Classification:

G06G 718

US Classification:

364828

Abstract:

A circuit and method for estimating gradients of a target function using noise injection and correlation is provided. In one embodiment, an input signal is combined with an input noise signal and the combined signal is input to a circuit which computes the output of the target function. An amplified noise signal and output signal of the target function are input to a multiplier which performs a correlation of the inputs. The output of the multiplier is processed by a low-pass filter which generates the gradient. The circuit and method can be expanded to N-dimensions. Furthermore, in a alternate embodiment, a differentiator is coupled between the multiplier and amplifier and the multiplier and the output of the target function to differentiate the two signals prior to input to the multiplier. In other embodiments, the circuit may be used to compute gradient-like signals, wherein each component of the gradient is individually scaled by a different value. The output of the circuit can then be used in other descent algorithms.

US Patent:

53813618, Jan 10, 1995

Filed:

May 14, 1993

Appl. No.:

8/061848

Inventors:

David B. Kirk - South Pasadena CA
Alan H. Barr - Pasadena CA

Assignee:

California Institute of Technology - Pasadena CA

International Classification:

G06G 700

US Classification:

364807

Abstract:

A circuit and method for executing real time constraint solution permits real time control of computational tasks using analog very large scale integrated (VLSI) circuits. The constraints of a computation or task are first defined as a function or set of functions. The function(s) are used to produce an error measure function which described how well the constraint(s) is/are stisfied. Analog gradient descent techniques are then used to minimize the error measure function and produce an improved output of the task and optionally adjust the performance of the task. As this is performed in analog VLSI, the constraint solution can be performed continuously and continually in real time, without the limitations of discrete optimization as implemented using digital processing.

US Patent:

54425832, Aug 15, 1995

Filed:

May 14, 1993

Appl. No.:

8/061849

Inventors:

David B. Kirk - South Pasadena CA
Alan H. Barr - Pasadena CA

Assignee:

California Institute of Technology - Pasadena CA

International Classification:

G06G 716

US Classification:

364841

Abstract:

The multiplier which includes built-in adjustments to improve circuit performance. More specifically, the multiplier is a compensated multiplier to increase the accuracy and precision of computation using analog very large scale integrated (VLSI) circuits and consists of adjustable parameters which allow for the improvement of the linear range of behavior as well as the cancellation of input offsets. A differential multiplier is further described in which adjustable parameters in addition to the four inputs to the multiplier compensate for offsets and non-linearities to result in a highly accurate analog multiplier.