David M Kirk

US Patent:

7053904, May 30, 2006

Filed:

Dec 15, 2003

Appl. No.:

10/736006

Inventors:

David B. Kirk - Santa Clara CA, US
Matthew N. Papakipos - Palo Alto CA, US
Rui M. Bastos - Santa Clara CA, US
John Erik Lindholm - Saratoga CA, US
Steven E. Molnar - Chapel Hill NC, US
John S. Montrym - Cupertino CA, US
Walter E. Donovan - Saratoga CA, US

Assignee:

NVIDIA Corporation - Santa Clara CA

International Classification:

G09G 5/39
G09G 5/36
G06T 1/60

US Classification:

345531, 345530, 345557

Abstract:

Apparatuses and methods for detecting position conflicts during fragment processing are described. Prior to executing a program on a fragment, a conflict detection unit, within a fragment processor checks if there is a position conflict indicating a RAW (read after write) hazard may exist. A RAW hazard exists when there is a pending write to a destination location that source data will be read from during execution of the program. When the fragment enters a processing pipeline, each destination location that may be written during the processing of the fragment is entered in conflict detection unit. During processing, the conflict detection unit is updated when a pending write to a destination location is completed.

US Patent:

7139003, Nov 21, 2006

Filed:

Dec 15, 2003

Appl. No.:

10/736437

Inventors:

David B. Kirk - Santa Clara CA, US
Matthew N. Papakipos - Palo Alto CA, US
Rui M. Bastos - Santa Clara CA, US
John Erik Lindholm - Saratoga CA, US
Steven E. Moinar - Chapel Hill NC, US

Assignee:

Nvidia Corporation - Santa Clara CA

International Classification:

G09G 5/39
G06T 1/60
G06T 1/20

US Classification:

345531, 345530, 345506

Abstract:

Apparatuses and methods for detecting position conflicts during fragment processing are described. Prior to executing a program on a fragment, a conflict detection unit, within a fragment processor checks if there is a position conflict indicating a RAW (read after write) hazard may exist. A RAW hazard exists when there is a pending write to a destination location that source data will be read from during execution of the program. When the fragment enters a processing pipeline, each destination location that may be written during the processing of the fragment is entered in conflict detection unit. During processing, the conflict detection unit is updated when a pending write to a destination location is completed.

US Patent:

7209140, Apr 24, 2007

Filed:

May 31, 2000

Appl. No.:

09/586249

Inventors:

John Erik Lindholm - Cupertino CA, US
David B. Kirk - Santa Clara CA, US
Henry P. Moreton - Woodside CA, US
Simon Moy - Mountain View CA, US

Assignee:

NVIDIA Corporation - Santa Clara CA

International Classification:

G06T 1/00

US Classification:

345522, 345506, 345582, 345591

Abstract:

A system, method and article of manufacture are provided for programmable processing in a computer graphics pipeline. Initially, data is received from a source buffer. Thereafter, programmable operations are performed on the data in order to generate output. The operations are programmable in that a user may utilize instructions from a predetermined instruction set for generating the same. Such output is stored in a register. During operation, the output stored in the register is used in performing the programmable operations on the data.

US Patent:

7274369, Sep 25, 2007

Filed:

Jun 9, 2005

Appl. No.:

11/148584

Inventors:

Rui M. Bastos - Santa Clara CA, US
Daniel Elliott Wexler - Soda Springs CA, US
Larry Gritz - Berkeley CA, US
Jonathan Rice - San Francisco CA, US
Harold Robert Feldman Zatz - Palo Alto CA, US
Matthew N. Papakipos - Palo Alto CA, US
David Kirk - Santa Clara CA, US

Assignee:

NVIDIA Corporation - Santa Clara CA

International Classification:

G06T 1/20
G09G 5/39
G09G 5/00
G06F 7/38
G06F 7/32
G06F 9/30

US Classification:

345531, 345506, 345629, 708233, 708521, 712219

Abstract:

Digital Image compositing using a programmable graphics processor is described. The programmable graphics processor supports high-precision data formats and can be programmed to complete a plurality of compositing operations in a single pass through a fragment processing pipeline within the programmable graphics processor. Source images for one or more compositing operations are stored in graphics memory, and a resulting composited image is output or stored in graphics memory. More-complex compositing operations, such as blur, warping, morphing, and the like, can be completed in multiple passes through the fragment processing pipeline. A composited image produced during a pass through the fragment processing pipeline is stored in graphics memory and is available as a source image for a subsequent pass.

US Patent:

7477266, Jan 13, 2009

Filed:

Sep 24, 2004

Appl. No.:

10/949923

Inventors:

Rui M. Bastos - Santa Clara CA, US
Daniel Elliott Wexler - Soda Springs CA, US
Larry Gritz - Berkeley CA, US
Jonathan Rice - San Francisco CA, US
Harold Robert Feldman Zatz - Palo Alto CA, US
Matthew N. Papakipos - Palo Alto CA, US
David Kirk - Santa Clara CA, US

Assignee:

NVIDIA Corporation - Santa Clara CA

International Classification:

G09G 5/00
G06F 15/00

US Classification:

345634, 345582, 345501

Abstract:

Digital Image compositing using a programmable graphics processor is described. The programmable graphics processor supports high-precision data formats and can be programmed to complete a plurality of compositing operations in a single pass through a fragment processing pipeline within the programmable graphics processor. Source images for one or more compositing operations are stored in graphics memory, and a resulting composited image is output or stored in graphics memory. More-complex compositing operations, such as blur, warping, morphing, and the like, can be completed in multiple passes through the fragment processing pipeline. A composited image produced during a pass through the fragment processing pipeline is stored in graphics memory and is available as a source image for a subsequent pass.

US Patent:

7683905, Mar 23, 2010

Filed:

Jul 26, 2006

Appl. No.:

11/493484

Inventors:

David B. Kirk - Santa Clara CA, US
Matthew N. Papakipos - Palo Alto CA, US
Rui M. Bastos - Santa Clara CA, US
John Erik Lindholm - Saratoga CA, US
Steven E. Molnar - Chapel Hill NC, US

Assignee:

NVIDIA Corporation - Santa Clara CA

International Classification:

G06T 1/20
G06T 1/60
G09G 5/00

US Classification:

345506, 345530, 345614

Abstract:

Apparatuses and methods for detecting position conflicts during fragment processing are described. Prior to executing a program on a fragment, a conflict detection unit, within a fragment processor checks if there is a position conflict indicating a RAW (read after write) hazard may exist. A RAW hazard exists when there is a pending write to a destination location that source data will be read from during execution of the program. When the fragment enters a processing pipeline, each destination location that may be written during the processing of the fragment is entered in conflict detection unit. During processing, the conflict detection unit is updated when a pending write to a destination location is completed.

US Patent:

7697008, Apr 13, 2010

Filed:

Feb 28, 2007

Appl. No.:

11/680125

Inventors:

John Erik Lindholm - Cupertino CA, US
David B. Kirk - Santa Clara CA, US
Henry P. Moreton - Woodside CA, US
Simon Moy - Mountain View CA, US

Assignee:

NVIDIA Corporation - Santa Clara CA

International Classification:

G06T 1/00

US Classification:

345522, 345506, 345582, 345426, 345591

Abstract:

A system, method and article of manufacture are provided for programmable processing in a computer graphics pipeline. Initially, data is received from a source buffer. Thereafter, programmable operations are performed on the data in order to generate output. The operations are programmable in that a user may utilize instructions from a predetermined instruction set for generating the same. Such output is stored in a register. During operation, the output stored in the register is used in performing the programmable operations on the data.

US Patent:

7755636, Jul 13, 2010

Filed:

Nov 19, 2007

Appl. No.:

11/942582

Inventors:

John Erik Lindholm - Cupertino CA, US
David B. Kirk - Santa Clara CA, US
Henry P. Moreton - Woodside CA, US
Simon Moy - Mountain View CA, US

Assignee:

NVIDIA Corporation - Santa Clara CA

International Classification:

G09G 5/00
G06T 15/50
G06T 1/00
G06F 15/00

US Classification:

345582, 345426, 345418, 345419, 345506

Abstract:

A system, method and article of manufacture are provided for programmable processing in a computer graphics pipeline. Initially, data is received from a source buffer. Thereafter, programmable operations are performed on the data in order to generate output. The operations are programmable in that a user may utilize instructions from a predetermined instruction set for generating the same. Such output is stored in a register. During operation, the output stored in the register is used in performing the programmable operations on the data.